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Epson LQ 1050 - B/W Dot-matrix Printer - Page 104

Epson LQ 1050 - B/W Dot-matrix Printer
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REV.-A
2.3.5.5 Printhead Control Circuit
g
‘:4
$-,,
Printing is controlled by the CPU
(~PE78
10HG), gate array
(E05A
15HA), nine drive transistors, and
printhead.
Print data output from the CPU is stored in the buffer of the E05A15HA gate array. The
printhead drive pulse output from
PC6
of the CPU enables the buffer is the gate array, and the 9 bits
of print data stored in the buffer are output to turn on or off the
printhead drive transistors so that
the drive voltages are applied to the
printhead coils. Figure 2-50 shows a block diagram of the
printhead
control circuit.
CPU(MPD7810HG)
GA(E05A
15HA)
Y
1
(4B)
(3A)
Printhead
Buffer
C3987X9
r–1
P7
?
r,
)
u’
)
~.
=
‘!’
r
--—.
-\
II
PDO
— --
v
1’
II
-D
II
PC6
--- —--
J
I
I
GP
—-
-—
+5
ANO
L
1
Vp
AN2
-:”
x
...4
Figure 2-50. Printhead Control Circuit Block Diagram
2-60

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