REV.-A
2.3.3.3 E05A16GA Gate Array Functions
The E05A16GA gate array is selected by the CS signal (pin 37: decoded by the higher address in the
E05A 15HA) from the E05A15HA gate array (3A), and the internal function of this gate array is activated
when the CPU reads or writes data at the memory mapped address
,(lower
address: AO through A3).
Table 2-5 shows the pin assignments for this gate array. Refer to the Appendix for the detailed
specifications on this gate array.
Table
2-5. Pin Function of GA
(E05A16GA)
Pin No. Signal Name
Direction
Function
1
D4
IN/OUT
Data bus bit 4-7
I
I
4
D7
5
RXDIN
IN
Not used
6
RSTIN
1
IN
Initialize signal (IN IT) input: Low active signal
7
Vss
—
Logic ground
8
RSTIN2
IN
Power-on reset signal
9
IN7
IN
Parallel data (D7-D2)
I
I
14
IN2
15
STRB
IN
Strobe signal
17
IN 1
IN
Parallel data
(D1-DO)
I
I
18
INO
19 RSTOUT
OUT
Reset signal output which the
RSTIN1
or RSTIN2
signal is input.
20
BUSY
OUT
BUSY signal
21 ACK
OUT
Acknowledge signal
22
PE
OUT
Paper End signal
23
ERR
OUT
ERROR signal
24
PC3
OUT
Carriage motor control signal
25
PC2
OUT
Buzzer control signal
26
Pc 1
OUT
Plunger solenoid ON/OFF control signal
27
Pco
OUT
Carriage motor control signal
28
RXDOUT
OUT
RXD Signal output
29
PD 1
OUT Carriage motor Power-down signal
30
PDO
OUT
+ 24V DC control signal
31
PAO
IN
FONT switch (control panel) status monitor
32
VDD
IN
Power source
33
PA1
IN
PITCH switch (control panel) status monitor
34
PA2
IN
CONDENSED switch (control panel) status monitor
35
Vss
—
Logic ground
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