5-362 L90 LINE CURRENT DIFFERENTIAL SYSTEM – INSTRUCTION MANUAL
CONTROL ELEMENTS CHAPTER 5: SETTINGS
5
breaker restrike condition is declared in the corresponding phase and the BRK RESTRIKE 1 OP operand asserts for a short
period of time. The user can add counters and other logic to facilitate the decision making process as to the appropriate
actions upon detecting a single restrike or a series of consecutive restrikes.
A restrike event (FlexLogic operand) is declared if all of the following hold:
• The current is initially interrupted
• The breaker status is open
• An elevated high frequency current condition occurs (if the
BREAKER RESTRIKE 1 HF DETECT setting is Enabled, otherwise
the condition is bypassed), and
• The current subsequently drops out again
The algorithm is illustrated in the following state machine diagram.
Figure 5-206: Algorithm illustration of state machine to detect restrike
In this way, a distinction is made between a self-extinguishing restrike and permanent breaker failure condition. The latter
can be detected by the breaker failure function or a regular instantaneous overcurrent element. Also, a fast succession of
restrikes is picked up by breaker failure or instantaneous overcurrent protection.
The following settings are available for each element.
BREAKER RESTRIKE 1 FUNCTION — Enables and disables operation of the breaker restrike detection element.
BRK RSTR 1 BLOCK — Blocks operation of the breaker restrike detection element.
BREAKER RESTRIKE 1 SOURCE — Selects the source of the current for this element. This source must have a valid CT bank
assigned.
BREAKER RESTRIKE 1 PICKUP — Specifies the pickup level of the overcurrent detector in per-unit values of CT nominal
current.
BREAKER RESTRIKE 1 RESET DELAY — Specifies the reset delay for this element. When set to “0 ms,” then FlexLogic operand is
picked up for only 1/8th of the power cycle.
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