GW Instek PSU Series - Page 99

CONFIGURATION
99
Show Version
F-89
0, 1 = Version
2, 3, 4, 5 = Build date (YYYYMMDD)
6, 7 = Keyboard CPLD
8, 9 = Analog Board CPLD
A, B = Analog Board FPGA
C, D, E, F = Kernel Build
(YYYYMMDD)
G, H = Test Command Version
I, J, K, L = Test Command Build
(YYYYMMDD)
M,N = Reserved
O,P = Option module
Power On Configuration Settings*
CV Control
F-90
0 = Control by Local
1 = Control by External Voltage
2 = Control by External Resistor -
Rising
3 = Control by External Resistor -
Falling
4 = Control by Isolated Board
CC Control
F-91
0 = Control by Local
1 = Control by External Voltage
2 = Control by External Resistor -
Rising
3 = Control by External Resistor -
Falling
4 = Control by Isolated Board
Output Status when
Power ON
F-92
0 = Safe Mode (Always OFF),
1 = Force Mode (Always ON),
2 = Auto Mode (Status before last
time power OFF)
Master/Slave
Configuration
F-93
0 = Independent
1 = Master with 1 slave in parallel
2 = Master with 2 slaves in parallel
3 = Master with 3 slaves in parallel
4 = Slave (parallel)
External Output Logic
F-94
0 = High ON, 1 = Low ON
Monitor Voltage Select
F-96
0 = 5V , 1 = 10V
Control Range
F-97
0 = 5V [5kΩ], 1 = 10V [10kΩ]