Intel 5000 Series User Manual

System BIOS Intel® 5000 Series Chipsets Server Board Family Datasheet
Revision 1.1
Intel order number D38960-004
42
4. The BMC lights the DIMM fault LED for the faulty FBDIMM.
3.3.10.1.4 Multi-bit Correctable Error Counter Threshold
Due to the internal design of the chipset, the same threshold value for correctable errors also
applies to the multi-bit correctable errors. However, maintaining a tolerance level of 10 for multi-
bit correctable errors is undesirable because these are critical errors. Therefore, the BIOS
programs the threshold for multi-bit correctable errors based on the following alternate logic:
 Automatic retries on memory errors: The chipset automatically performs a retry of
memory reads for uncorrectable errors. If the retry results in good data, this is termed a
multi-bit correctable error. If the data is still bad, then it is an uncorrectable error, if
memory controller is not configured to memory mirroring mode. The retry eliminates
transient CRC errors that occur on memory packets transacted over the FBDIMM serial
links between the chipset and the FBDIMMs.
 Internal error reporting by the chipset: The chipset records the occurrence of
uncorrectable errors both at the time of the occurrence, and on the subsequent failure
on retry. Both errors are independently reported to the BIOS.
3.3.10.1.5 FBD Fatal Error Threshold
In addition to standard ECC errors, the BIOS monitors FBD protocol errors reported by the
chipset. FBD protocol errors cause degradation of system memory, and hence it is pointless to
tolerate them to any level. The BIOS maintains an internal software counter to handle FBD
errors. The threshold of this software counter is 1.
3.3.10.1.5.1 BIOS Policies on Uncorrectable Errors
For uncorrectable errors, the BIOS will log a single Uncorrectable Error SEL entry. The BIOS
generates an NMI.

Intel 5000 Series Specifications

General

Brand	Intel
Model	5000 Series
Category	Server Board
Language	English