Functional Architecture Intel® Server Board S2600IP and Intel® Workstation Board W2600CR TPS
36 Revision 1.1
Intel order number G34153-003
3.3.7 PCI Interface
The Intel
®
C600-A chipset PCI interface provides a 33 MHz, Revision 2.3 implementation. The
Intel
®
C600-A chipset integrates a PCI arbiter that supports up to four external PCI bus masters
in addition to the internal Intel
®
C600-A chipset requests. This allows for combinations of up to
four PCI down devices and PCI slots.
3.3.8 Low Pin Count (LPC) Interface
The Intel
®
C600-A chipset implements an LPC Interface as described in the LPC 1.1
Specification. The Low Pin Count (LPC) bridge function of the Intel
®
C600-A resides in PCI
Device 31: Function 0. In addition to the LPC bridge interface function, D31:F0 contains other
functional units including DMA, interrupt controllers, timers, power management, system
management, GPIO, and RTC.
3.3.9 Serial Peripheral Interface (SPI)
The Intel
®
C600-A chipset implements an SPI Interface as an alternative interface for the BIOS
flash device. The SPI flash is required to support Gigabit Ethernet and Intel
®
Active
Management Technology. The Intel
®
C600-A chipset supports up to two SPI flash devices with
speeds up to 50 MHz.
3.3.10 Compatibility Modules (DMA Controller, Timer/Counters, Interrupt
Controller)
The DMA controller incorporates the logic of two 82C37 DMA controllers, with seven
independently programmable channels. The Intel
®
C600-A chipset supports LPC DMA through
the Intel
®
C600-A chipset’s DMA controller.
The timer/counter block contains three counters that are equivalent in function to those found in
one 82C54 programmable interval timer. These three counters are combined to provide the
system timer function, and speaker tone.
The Intel
®
C600-A chipset provides an ISA-Compatible Programmable Interrupt Controller (PIC)
that incorporates the functionality of two 82C59 interrupt controllers. In addition, the Intel
®
C600-
A chipset supports a serial interrupt scheme.
All of the registers in these modules can be read and restored. This is required to save and
restore system state after power has been removed and restored to the platform.
3.3.11 Advanced Programmable Interrupt Controller (APIC)
In addition to the standard ISA compatible Programmable Interrupt controller (PIC) described in
the previous section, the Intel
®
C600-A incorporates the Advanced Programmable Interrupt
Controller (APIC).
3.3.12 Universal Serial Bus (USB) Controllers
The Intel
®
C600-A chipset has up to two Enhanced Host Controller Interface (EHCI) host
controllers that support USB high-speed signaling. High-speed USB 2.0 allows data transfers up
to 480 Mb/s which is 40 times faster than full-speed USB. The Intel
®
C600-A chipset supports
up to fourteen USB 2.0 ports. All fourteen ports are high-speed, full-speed, and low-speed
capable.