Intel® Server Board S2600IP and Intel® Workstation Board W2600CR TPS Functional Architecture
Revision 1.1 37
Intel order number G34153-003
3.3.13 Gigabit Ethernet Controller
The Gigabit Ethernet Controller provides a system interface using a PCI function. The controller
provides a full memory-mapped or IO mapped interface along with a 64 bit address master
support for systems using more than 4 GB of physical memory and DMA (Direct Memory
Addressing) mechanisms for high performance data transfers. Its bus master capabilities enable
the component to process high-level commands and perform multiple operations; this lowers
processor utilization by off-loading communication tasks from the processor. Two large
configurable transmit and receive FIFOs (up to 20 KB each) help prevent data underruns and
overruns while waiting for bus accesses. This enables the integrated LAN controller to transmit
data with minimum interframe spacing (IFS).
The LAN controller can operate at multiple speeds (10/100/1000 MB/s) and in either full duplex
or half duplex mode. In full duplex mode the LAN controller adheres with the IEEE 802.3x Flow
Control Specification. Half duplex performance is enhanced by a proprietary collision reduction
mechanism.
3.3.14 RTC
The Intel
®
C600-A chipset contains a real-time clock with 256 bytes of battery-backed RAM. The
real-time clock performs two key functions: keeping track of the time of day and storing system
data. The RTC operates on a 32.768 KHz crystal and a 3 V battery.
3.3.15 GPIO
Various general purpose inputs and outputs are provided for custom system design. The
number of inputs and outputs varies depending on the Intel
®
C600-A chipset configuration.
3.3.16 Enhanced Power Management
The Intel
®
C600-A chipset’s power management functions include enhanced clock control and
various low-power (suspend) states (for example, Suspend-to-RAM and Suspend-to-Disk). A
hardware-based thermal management circuit permits software-independent entrance to low-
power states. The Intel
®
C600-A chipset contains full support for the Advanced Configuration
and Power Interface (ACPI) Specification, Revision 4.0a.
3.3.17 Manageability
In addition to Intel AMT the Intel
®
C600-A chipset integrates several functions designed to
manage the system and lower the total cost of ownership (TCO) of the system. These system
management functions are designed to report errors, diagnose the system, and recover from
system lockups without the aid of an external microcontroller.
3.3.18 System Management Bus (SMBus* 2.0)
The Intel
®
C600-A chipset contains a SMBus* Host interface that allows the processor to
communicate with SMBus* slaves. This interface is compatible with most I2C devices. Special
I2C commands are implemented.
The Intel
®
C600-A chipset’s SMBus* host controller provides a mechanism for the processor to
initiate communications with SMBus* peripherals (slaves). Also, the Intel
®
C600-A chipset
supports slave functionality, including the Host Notify protocol. Hence, the host controller
supports eight command protocols of the SMBus* interface (see System Management Bus
(SMBus*) Specification, Version 2.0): Quick Command, Send Byte, Receive Byte, Write
Byte/Word, Read Byte/Word, Process Call, Block Read/Write, and Host Notify.