NXP Semiconductors MPC5777M - Page 104

MPC5777M Microcontroller Data Sheet, Rev. 6
Electrical characteristics
NXP Semiconductors104
Figure 35. DSPI LVDS master mode – modified timing, CPHA = 0
Figure 36. DSPI LVDS master mode – modified timing, CPHA = 1
Data
Last Data
First Data
First Data
Data
Last Data
SIN
SOUT
PCSx
SCK Output
SCK Output
(CPOL = 0)
(CPOL = 1)
t
SCK
t
SDC
t
SDC
t
CSC
t
ASC
t
SUI
t
HI
t
SUO
t
HO
Data
Last Data
First Data
SIN
SOUT
Last Data
Data
First Data
SCK Output
SCK Output
PCSx
(CPOL = 0)
(CPOL = 1)
t
SUI
t
HI
t
SUO
t
HO
t
HI