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NXP Semiconductors MPC5777M - Page 139

NXP Semiconductors MPC5777M
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Document revision history
MPC5777M Microcontroller Data Sheet, Rev. 6
NXP Semiconductors 139
2 4/2013
Electrical characteristics—I/O pad specification
Table 11 (I/O pad specification descriptions)
Revised “Very strong configuration” description to include EBI data bus.
Added “EBI configuration” row.
Changed “Input only pads” description to “These pads, which ensure low input leakage,
are associated with the ADC channels” (was “These pads are associated with the ADC
channels and 32 kHz low power external crystal oscillator providing low input leakage”)
Changed note following table to “Each I/O pin on the device supports specific drive
configurations. See the signal description table in the device reference manual for the
available drive configurations for each I/O pin” (was “All pads can be configured in all
configurations”)
Table 12 (I/O input DC electrical characteristics)
New specification: V
DRFTTTL
(Input V
IL
/V
IH
temperature drift TTL)
New specification: V
DRFTAUT
(Input V
IL
/V
IH
temperature drift)
New specification: V
DRFTCMOS
(Input V
IL
/V
IH
temperature drift CMOS)
Conditions for V
IHCMOS_H
, V
IHCMOS
, V
ILCMOS_H
, V
ILCMOS
, V
HYSCMOS
, V
DRFTCMOS
are
now
3.0 V < V
DD_HV_IO
< 3.6 V and 4.5 V < V
DD_HV_IO
< 5.5 V (was 2.7 V < V
DD_HV_IO
< 3.6 V and 4.0 V < V
DD_HV_IO
< 5.5 V)
New specification: I
LKG_MED
(Digital input leakage for MEDIUM pad)
Footnotes give formulas for approximation of the variation of the minimum value with
supply of V
IHAUT
and V
HYSAUT
(previously stated formulas approximated upper value
instead of minimum value). Changed formula for V
IHAUT
to “0.69 x VDD_HV_IO” (was
“0.69 supply”). Changed formula for V
HYSAUT
to “0.11 x V
DD_HV_IO
” (was “0.11
supply”).
Footnote gives formula for approximation of the variation of the maximum value with
supply of V
ILAUT
(previously stated formula approximated upper value instead of
maximum value). Changed formula for V
ILAUT
to “0.49 x V
DD_HV_IO
” (was “0.49
supply”).
Added footnote: “In a 1 ms period, assuming stable voltage and a temperature
variation of ±30°C, VIL/VIH shift is within ±50 mV.”
•V
HYSAUT conditions column: replaced dash with 4.5V < VDD_HV_IO < 5.5V
•CIN row, changed GPIO input pins conditions Max value from “10” to 7pF and EBI input
pins Max value from “8” to “7pF”
Table 13 (I/O pull-up/pull-down DC electrical characteristics)
Significant revisions throughout this table, including new conditions for I
WPU
and
I
WPD
New specification: R
WPU
(Weak pull-up resistance)
New specification: R
WPD
(Weak pull-down resistance)
New figure: Figure 8 (Weak pull-up electrical characteristics definition)
New figure: Figure 18 (I/O output DC electrical characteristics definition)
Table 76. Revision history (continued)
Revision Date Description of changes

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