Circuit Diagrams and PWB Layouts
EN 133DVDR70 & DVDR75/0x1 7.
DVIO Board: Link+Codec
VDDQ
LCBR
DATA INPUT
REGISTER
PROGRAMMING
LRAS
LCBR
512Kx16
BANK
SELECT
OUTPUT BUFFER
VSSVSSQ
TIMING REGISTER
NC
512Kx16
ADDRESS REGISTER
LCKE
BURST LENGTH
LATENCY &
DECODER
COLUMN
LWCBR
LCAS
LWE
REGISTER
COL. BUFFER
LQDM
ROW DECODER
REFRESH COUNTER
ROW BUFFER
LDQM
LWE
I/O CONTROL
SENSE AMP
LRAS
VDD
NC
INTERF
<SCI>
PORT4
PORT3
CTRL
16-BIT TIMER
UNIT D
<TMD>
TEST
BLOCK
SELECTOR
SELECTOR
STREAM[7:0]
TSRW
PACKETEN
SYNC
CPU
CORE
HIGH-SPEED
INTERNAL ROM
FLD
IEEE 1394 LINK CORE
PLLAVDD
PLLDVDD
PLLAGND
PLLDGND
3.3GND
2.5VDD
SIO_CNTI
INTC
DV CODEC
CORE
SERIAL
INTERF
<UART?>
SERIAL
INTERFACE
3.3VDD
HOST
2.5GND
CONTROL
SYSTEM
MEMORY
SIO_CNTO
TSSUB
VD[7:0]
VSYNC
HSYNC
192K BYTE
HIGH-SPEED
INTERNAL RAM
60K BYTE
2433 D12
2434 D12
3541 G4
3542 G7
3545 G4
3546 G7
only for development
89
3547 G4
3498 B13
B
C
3499 A13
3530 F7
F
G
3531 F4
3532 F4
1902 B14
1905 A6
3533 F4
3534 F7
G
H
3535 G4
3536 G7
LINK + CODEC
3537 G4
3538 G7
3539 G4
3540 G7
23
3543 G4
3544 G7
67
only for development
10 11
14
145
2448 E14
2449 C11
not used
D
E
13 14
H
I
C
D
2431 D11
2432 D12
3439 I1
3440 I1
2435 D12
2436 E12
1
45 89
2437 D13
12 13
2440 D13
2441 E12
23
2444 E12
2445 D14
67
3458 F1
3459 F1
10 11
2452 C13
2455 C13
2456 C14
3427 H2
3428 H2
12
3431 I2
3432 I2
A
B
3435 I2
3436 I2
E
F
3476 A10
3477 A9
I
A
not used
3443 I1
3446 B4
3447 H7
2438 D13
2439 E12
3450 A9
3451 I8
2442 D14
2443 D14
3454 G1
3455 E1
2446 E13
2447 E13
3494 I11
3495 I11
2450 C12
2451 C12
2453 C13
2454 C13
3425 A8
3426 H2
3464 F1
3465 F1
3429 H3
3430 I3
3468 G1
3469 G1
3433 I2
3434 I2
3472 A10
3473 A10
3437 I2
3438 I1
3562 F2
3563 H2
3441 I1
3442 I1
5432 D11
3444 I1
3445 I1
3482 I10
3483 I10
3448 I8
3449 B5
3486 I11
3487 I11
3452 H8
3453 A5
3490 I10
3491 I10
3456 E1
3457 F1
F438 B5
F439 B9
3460 G1
3461 A5
F440 B4
F441 B5
F442 B8
F443 B5
not used
3462 G1
3463 E1
3550 H7
3551 H4
3466 F1
3467 F1
3554 H7
3555 H4
3470 A6
3471 F3
3558 H4
3559 I7
3474 A9
3475 B9
7431 B10
7432 H9
3478 A10
3479 G14
7433 C11
F0201 B14
F0202 B14
F0203 B14
F0204 B14
F0205 B14
F430 C12
F431 F3
3480 G14
3481 I9
F432 F2
F433 G9
3484 I10
3485 I11
F434 G9
F435 D12
3488 I11
3489 I9
F436 E14
F437 E12
3492 I10
3493 I10
3V3_LINK
3496 I11
3497 B13
not used
3548 G7
3549 H4
3552 H7
3553 H4
3556 H4
3557 H7
3560 I7
3561 I7
3564 E4
5431 C12
5433 E11
5434 E14
7430 F6
100n
2441
GND
3459
10K
2446
100n
2450
10u
GND
2445
100n
2436
100n
100n
2434
3483
10K
3482
10K
F430
GND
GND
F433
F0205
100MHZ
5432
10K
3473
3V3_LINK
2452
100n
104147
WE_ 15
F0204
40
36DQMH
DQML 14
33
37
RAS_ 17
1257133844
26504
18
2 DQ0
DQ13
DQ1042
DQ1143
DQ1245
DQ1346
DQ1448
DQ1549
DQ25
DQ36
DQ48
DQ59
DQ611
DQ712
DQ839
DQ9
A0 21
A1 22
A10 20
A2 23
A3 24
A4 27
A5 28
A6 29
A7 30
A8 31
A9 32
19BA
CAS_ 16
CKE 34
CLK 35
CS_
3V3_F
MT48LC1M16A1TG
7430
10K
3489
10K
3429
3498
10K
2449
100n
10K
3493
F435
2454
100n
GND
3V3
GND
3495
10K
3485
10K
5431
100MHZ
10K
3427
3461
47K
10K
3491
3494
10K
2444
100n
3453
1K
10K
3468
GND
3V3
10K
3476
10K
3484
3444
10K
2437
100n
100n
2453
10K
3445
10K
3486
3457
10K
3446
10K
3465
10K
3455
10K
100n
2447
GND
100n
2448
100n
2456
100n
2451
F0202
3V3
F436
10K
3428
342510K
GND
100n
2438
2433
100n
GND
10
13
14
15
R-B_
RP_
12
VCC
37
VSS1
27
VSS2
46
W_
11
10K
3470
DQ11
36
39
DQ12
DQ13
41
DQ14
43
45
DQ15|A-1
DQ2
33
DQ3
35
DQ4
38
DQ5
40
42
DQ6
DQ7
44
DQ8
30
DQ9
32
E_
26
28
G_
9
A16
48
A17
17
A18
16
A2
23
A3
22
A4
21
A5
20
A6
19
18
A7
A8
8
A9
7
BYTE_
47
DQ0
29
31
DQ1
34
DQ10
7432
25
A0
A1
24
A10
6
A11
5
A12
4
A13
3
A14
2
A15
1
10K
3447
GND
M29W800AT
3496
10K
3481
10K
3477
10K
LF25C
7433
GND
IN OUT
3451
10K
3V3_LINK
GND
GND
3426
10K
100n
2440
GND
47K
3479
3438
10K
3V3_LINK
10K
3437
10K
3492
2442
3V3_LINK
3487
10K
100n
F0201
3V33V3_RAM
F432
3471 10K
2455
100n
3V3_F
22R
3537
10K
3475
22R
3533
22R
3531
10K
3442
3V3_LINK
3V3_LINK
3552
22R
10K
3454
GND
10K
3488
GND
10K
3460
F0203
2V5
3V3_RAM
1905
1
2
GND
GND
F439
10K
3497
10K
3440
2443
100n
2439
10K
3439
3436
10K
100n
10K
3449
10K
3434
3433
10K
3462
10K
10K
3432
22R
3561
3539
22R
3560
22R
GND
22R
3546
GND
22R
3542
22R
3538
22R
3534
2435
100n
3535
22R
3443
10K
3532
22R
3441
10K
22R
3554
3530
22R
22R
3550
3448
10K
3478
1K
10K
3499
GND
10K
3458
22R
3559
F442
22R
3556
22R
3549
22R
3553
22R
3545
5434
100MHZ
1K
3474
47u
2431
GND
3435
10K
3431
10K
3543
22R
3430
10K
3472
1K
22R
3541
3548
22R
3544
22R
GND
3540
22R
F440
10K
3536
22R
3490
F437
F431
3480
1K
F434
22R
3557
10K
3450
F443
GND
3V3_LINK
2V5
3V3_RAM
3V3_LINK
3563
1R
3547
22R
GND
22R
3564
GND
10K
3466
1902
1
2
3
4
5
GND
3452
10K
5433
100MHZ
+5V
3551
22R
3463
3467
10K
GND
3456
10K
10K
3469
10K
10K3562
3555
22R
100n
2432
3V3_F
177 WRZ
3558
22R
29 TSRW1
36 TSRW2|FLD
32 TSSUB1
38 TSSUB2
149TXD|P43
50 VCLKI
51 VCLKO
53 VPWM
44
45 STREAM25|VD5
STREAM26|VD646
47 STREAM27|VD7
SYNC130
37 SYNC2
28 TSERROR1
34 TSERROR2|HSYNC
23 STREAM14
24 STREAM15
25 STREAM16
26 STREAM17
40 STREAM20|VD0
41 STREAM21|VD1
STREAM22|VD242
43 STREAM23|VD3
STREAM24|VD4
SCLK
151SCS|P45
SI|P41 146
145SO|P40
STREAM1019
20 STREAM11
21 STREAM12
22 STREAM13
P_D7
P_D8 135
136P_D9
176 RDZ
RESETB 1
119RWZ
150RXD|P44
147SCK|P42
15
141
P_D14 142
143P_D15
P_D2 128
P_D3 129
P_D4 130
P_D5 132
133P_D6
134
198
105PSSEL0
106PSSEL1
125P_D0
126P_D1
P_D10 137
138P_D11
P_D12 139
P_D13
PHY_D2
PHY_D3 7
6PHY_D4
PHY_D5 4
PHY_D6 3
PHY_D7 2
200 199
201
P33
155P34
27 PACKETEN1
33 PACKETEN2|VSYNC
96 PCM1
97 PCM2
11PHY_D0
PHY_D1 10
8
MD7
MD864
65 MD9
76 MRAS
74 MWE
204P30
152P31
153P32
154
MD13
72 MD14
73 MD15
MD257
MD358
MD459
MD560
MD661
62
MA9
75 MCAS
77 MCLK
MD054
MD155
66 MD10
69 MD11
70 MD12
71
MA11
MA281
83 MA3
84 MA4
MA585
MA686
87 MA7
MA888
89
IOCHRDY
120IOR
18LINKON
17LPS
16LREQ
MA079
80 MA1
90 MA10
92
202HS_CLK
203IC1
IC2 205
206IC3
IC4 207
208IFIROME
124INT
123
D5183
184 D6
185 D7
186 D8
189 D9
DMAACK 121
122DMAREQ
197HCLKSEL
191 D11
192 D12
193 D13
194 D14
196 D15
D2180
181 D3
182 D4
101 AMCLKO
102 APWM
117CS
13CTL0
12CTL1
178 D0
179 D1
190 D10
115
98 AEMP1
100 AEMP2
48 AFS1
49 AFS2
93 ALRCK
103 AMCLK44
104 AMCLK48
116AD10
108AD2
AD3 109
110AD4
AD5 111
112AD6
AD7 113
114AD8
AD9
159
160 A5
161 A6
A7162
163 A8
164 A9
94 ABCK
AD1 107
A12
169 A13
171 A14
172 A15
174 A16
175 A17
A2157
158 A3
A4
63
78
95
127
140
166
156 A1
165 A10
167 A11
168
56
68
82
99
131
148
173
5
187
31
52
39
91
144
195
14
67
118
170
9
188
35
UPD72893
7431
F438
F441
2V5
MD(2)
MD(1)
MD(0)
MA(11)
APWM
HS_CLK
3464
10K
MD(9)
MD(8)
MD(7)
MD(6)
MD(5)
MD(4)
MD(3)
MD(2)
MD(1)
MD(0)
MD(0:15)
MD(0:15)
MD(13)
MD(12)
MD(11)
MD(10)
MD(9)
MD(8)
MD(7)
MD(6)
MD(5)
MD(4)
MD(3)
MA(8)
MA(7)
MA(6')
MA(5)
MA(3)
MA(2)
MA(1)
MA(0)
{AFS1,AFS2,ALRCK,ABCK,AEMP1,PCM1,PCM2}
AMCLK44
{APWM,AMCLK44,AMCLK48}
DV_STATUS
MA(0:11)
CLK27M_CON
MD(15)
MD(14)
MD(13)
MD(12)
MD(11)
MD(10)
MD(15)
MD(14)
MD(13)
MD(12)
MD(11)
MD(10)
MA(11)
MA(10)
MA(9)
MA(8)
MA(7)
MCLK
MRAS
MCAS
MWE
MD(0)
AFS2
AFS1
ALRCK
ABCK
AEMP1
PCM1
PCM2
MA(10)
MA(9)
A(15)
A(14)
A(13)
A(12)
A(11)
A(10)
YUV(7)
YUV(6)
YUV(5)
YUV(4)
YUV(3)
YUV(2)
YUV(1)
YUV(7:0)
YUV(0)
A(7)
A(8)
A(9)
D(9)
D(8)
D(7)
D(6)
D(5)
D(4)
D(3)
D(2)
D(1)
D(0)
D(15)
D(14)
D(13)
D(12)
D(11)
D(10)
AD(10)
A(17)
A(16)
PD(6)
PD(5)
PD(4)
PD(3)
PD(2)
PD(1)
PD(0)
AD(9)
AD(8)
AD(7)
AD(6)
AD(5)
AD(4)
AD(3)
AD(2)
AD(1)
AD(1:10)
PD(0:15)
A(1)
A(2)
A(3)
A(4)
A(5)
A(6)
MA(4)
A(1:17)
D(0:15)
MD(9)
MD(8)
MD(7)
MD(6)
MD(5)
MD(4)
MD(3)
MD(2)
MD(1)
HS_CLK
PD(15)
PD(14)
PD(13)
PD(12)
PD(11)
PD(10)
PD(9)
PD(8)
PD(7)
D(0)
A(17)
A(16)
A(15)
A(14)
A(13)
A(12)
A(11)
A(10)
A(9)
A(8)
A(7)
A(6)
A(5)
A(4)
A(3)
A(2)
A(1)
MRAS
MCAS
MWE
MCLK
{MCAS,MRAS,MCLK,MWE}
MA(6)
MA(5)
MA(4)
MA(3)
MA(2)
MA(1)
MA(0)
RESTB
D(15)
D(14)
D(13)
D(12)
D(11)
D(10)
D(9)
D(8)
D(7)
D(6)
D(5)
D(4)
D(3)
D(2)
D(1)
PHY_D(7)
CS
INT
IOR
RWZ
MD(15)
MD(14)
D(15)
D(14)
D(13)
D(12)
D(11)
D(10)
D(9)
D(8)
D(7)
D(6)
D(5)
D(4)
D(3)
D(2)
D(1)
D(0)
CTL0
CTL1
LKON
LPS
LREQ
SCLK
PHY_D(0)
PHY_D(1)
PHY_D(2)
PHY_D(3)
PHY_D(4)
PHY_D(5)
PHY_D(6)
PHY_D(0:7)
{SCLK,CTL0,CTL1,LREQ,LPS,LKON}
{INT,IOR,RWZ,CS}
RESTB
ALRCK
ABCK
PCM2
PCM1
AMCLK48
TR03015_001
090702
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