6-17
BVM-D32E1WA/D32E1WE/D32E1WU
6-6. D1 Board
1. Fundamental waveform signals generator circuit
The fundamental waveform signals that are required to generate the deflection correction waveforms are
generated by this circuit.
IC101 generates the fundamental waveform signals of H. SAW-, H. PARA- and H. SIN- having the
horizontal cycle from the pulse (AFC.P) that is output from the horizontal deflection after wave-shaping
with Q25 to Q28 and IC1005 of the E board. IC102 generates the fundamental waveform signals of V.
SAW-, V. PARA-, V. SIN- and V.4TH- having the vertical cycle from the vertical period pulse
(V.BLK.P) that is generated from IC2001, IC2301 (4/4) and IC2303 of the E board. These waveforms
are inverted by IC103 and IC104 to generate the H. SAW, H. SIN. V. SAW and V. PARA+ signals.
At the same time, the V. SQ signal having the 1/2 vertical rate pulse width is generated from the V. SAW
signal at IC105 (1/2). The V. PARA.T and the V.PARA.B signals are generated from the V. SQ signal
and the V. PARA+ signals by IC205.
2. D/A converter
The fundamental waveforms that are outputted from IC102 and IC104, and the V. PARA.T and the
V.PARA.B signals that are outputted from IC205, are sent to IC202 and IC206 (D/A converter) where
these signals modulate the D/A conversion reference voltage to generate the following signals.
The signal level of the following signals can be varied by the serial data that is supplied from IC7001 (sub
CPU) of the E board. The adjustment voltages are also outputted at the same time.
. Modulated by the V. SAW signal
DFY. PHASE
. Modulated by the V. PARA+ signal
H. CENTER. BOW, H. MID. PIN, DFX. CORNER and DFY. T&B
. Modulated by the V. Sin signal
V. LIN. BAL2
. Modulated by the V. PARA.T signal
V. CONV. TOP
. Modulated by the V. PARA.B signal
V. CONV. BOT
. Adjustment voltages
V. STAT, H. STAT.C, H. LIN. BAL, H. LIN. GAIN, DFX. SIDE, and DFX. PHASE
3. Vertical convergence correction signal generator circuit
The V. CONV signal is generated by adding and inverting the V. CONV. TOP, V. CONV. BOT and V.
STAT signals.
4. Horizontal linearity correction signal generator circuit
The H. LIN signal is generated by adding the two signals by IC205: one is generated by modulating the
H. PARA- signal with the added outputs of the H. LIN. BAL and H. MID. PIN signals at IC203 (1/2).
The other signal is generated by adding the H. LIN. GAIN and H. CENER. BOW signals by IC203 (2/2).
5. Dynamic focus signal generator circuit
The DFX signal is generated by adding the two signals by IC205: one is generated by modulating the H.
PARA- signal with the added outputs of the DFX. SIDE, DFX. CORNER and V. PARA- signals at IC204
(2/2). The other signal is generated by modulating the H. SAW signal with the DFX. PHASE by IC205.
The DFY signal is generated by adding the signals of DFX. PHASE, DFY. T&B and V. PARA+ signals
by IC207 (1/2)
6. Horizontal convergence correction signal generator circuit
The H.SAW and the H.PARA signals are added and inverted in IC207 (2/2) where the H.CONV signal is
generated.
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