HAP-S1
90
Pin No. Pin Name I/O Description
K24 EIM_DA3 I Boot mode setting terminal Fixed at “L”
K25 EIM_DA6 I Boot mode setting terminal Fixed at “H”
L1 CSI0_DAT13 I Serial data or program data input from the system controller
L2 GND58 - Ground terminal
L3, L4
CSI0_DAT17,
CSI0_DAT16
- Not used
L5 GND59 - Ground terminal
L6 CSI0_DAT19 - Not used
L7 HDMI_VP - Power supply terminal for the HDMI interface Not used
L8 GND60 - Ground terminal
L9 VDDARM23_IN2 - Power supply terminal for the cores regulator Not used
L10 GND54 - Ground terminal
L11 VDDARM23_CAP4 O Internal regulator output terminal Not used
L12 GND55 - Ground terminal
L13 VDDARM_CAP4 O Internal regulator output terminal
L14 VDDARM_IN4 - Power supply terminal for the cores regulator (+1.42V)
L15 GND56 - Ground terminal
L16 VDDSOC_IN4 - Power supply terminal for the SOC and PU regulators (+1.42V)
L17 VDDPU_CAP4 O Internal regulator output terminal
L18 GND57 - Ground terminal
L19 NVCC_EIM1 - Power supply terminal for the EMI interface (+3.3V)
L20 to
L22
EIM_DA0, EIM_DA2,
EIM_DA4
I Boot mode setting terminal Fixed at “L”
L23 EIM_DA5 I Boot mode setting terminal Fixed at “H”
L24 EIM_DA8 O Reset signal output to the liquid crystal display “L”: reset
L25 EIM_DA7 I Boot mode setting terminal Fixed at “L”
M1 CSI0_DAT10 O Transmit data output terminal
M2 CSI0_DAT12 O Serial data or program data output to the system controller
M3 CSI0_DAT11 I Receive data input terminal
M4 CSI0_DAT14 O Transmit data output terminal Not used
M5 CSI0_DAT15 I Receive data input terminal Not used
M6 CSI0_DAT18 - Not used
M7 HDMI_VPH - Power supply terminal for the HDMI interface Not used
M8 GND65 - Ground terminal
M9 VDDARM23_IN3 - Power supply terminal for the cores regulator Not used
M10 GND61 - Ground terminal
M11 VDDARM23_CAP5 O Internal regulator output terminal Not used
M12 GND62 - Ground terminal
M13 VDDARM_CAP5 O Internal regulator output terminal
M14 VDDARM_IN5 - Power supply terminal for the cores regulator (+1.42V)
M15 GND63 - Ground terminal
M16 VDDSOC_IN5 - Power supply terminal for the SOC and PU regulators (+1.42V)
M17 VDDPU_CAP5 O Internal regulator output terminal
M18 GND64 - Ground terminal
M19 NVCC_EIM2 - Power supply terminal for the EMI interface (+3.3V)
M20 EIM_DA11 I Boot mode setting terminal Fixed at “H”
M21 to
M23
EIM_DA9, EIM_DA10,
EIM_DA13
I Boot mode setting terminal Fixed at “L”
M24 EIM_DA12 I Boot mode setting terminal Fixed at “H”
M25 EIM_WAIT I Boot mode setting terminal Fixed at “L”
N1 CSI0_DAT4 - Not used
N2 CSI0_VSYNC O Power on/off control signal output terminal for the FPGA power “H”: power on
N3 to N5
CSI0_DAT7,
CSI0_DAT6,
CSI0_DAT9
- Not used
N6 CSI0_DAT8 I INIT_DONE signal input from the FPGA
N7 NVCC_CSI I Power supply terminal for the camera sensor interface (+3.3V)
N8 GND69 - Ground terminal
N9 VDDARM23_IN4 - Power supply terminal for the cores regulator Not used
N10 GND66 - Ground terminal