ST STM32F31xx User Manual

UM1581
Reset and clock control (RCC)
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 RCC_IT_LSIRDY : LSI ready interrupt
 RCC_IT_LSERDY : LSE ready interrupt
 RCC_IT_HSIRDY : HSI ready interrupt
 RCC_IT_HSERDY : HSE ready interrupt
 RCC_IT_PLLRDY : PLL ready interrupt
 NewState : new state of the specified RCC interrupts. This
parameter can be: ENABLE or DISABLE.
Return values
 None.
Notes
 The CSS interrupt doesn't have an enable bit; once the CSS
is enabled and if the HSE clock fails, the CSS interrupt occurs
and an NMI is automatically generated. The NMI will be
executed indefinitely, and since NMI has higher priority than
any other IRQ (and main program) the application will be
stacked in the NMI ISR unless the CSS interrupt pending bit
is cleared.
18.2.9.2 RCC_GetFlagStatus
Function Name
FlagStatus RCC_GetFlagStatus ( uint8_t RCC_FLAG)
Function Description
Checks whether the specified RCC flag is set or not.
Parameters
 RCC_FLAG : specifies the flag to check. This parameter can
be one of the following values:
 RCC_FLAG_HSIRDY : HSI oscillator clock ready
 RCC_FLAG_HSERDY : HSE oscillator clock ready
 RCC_FLAG_PLLRDY : PLL clock ready
 RCC_FLAG_MCOF : MCO Flag
 RCC_FLAG_LSERDY : LSE oscillator clock ready
 RCC_FLAG_LSIRDY : LSI oscillator clock ready
 RCC_FLAG_OBLRST : Option Byte Loader (OBL)
reset
 RCC_FLAG_PINRST : Pin reset
 RCC_FLAG_PORRST : POR/PDR reset
 RCC_FLAG_SFTRST : Software reset
 RCC_FLAG_IWDGRST : Independent Watchdog reset
 RCC_FLAG_WWDGRST : Window Watchdog reset
 RCC_FLAG_LPWRRST : Low Power reset
Return values
 The new state of RCC_FLAG (SET or RESET).
Notes
 None.

ST STM32F31xx Specifications

General

Brand	ST
Model	STM32F31xx
Category	Microcontrollers
Language	English