ST STM32F31xx

Reset and clock control (RCC)
UM1581
346/584
DocID023800 Rev 1
 #define: RCC_I2S2CLKSource_Ext ((uint8_t)0x01)
RCC_Interrupt_Source
 #define: RCC_IT_LSIRDY ((uint8_t)0x01)
 #define: RCC_IT_LSERDY ((uint8_t)0x02)
 #define: RCC_IT_HSIRDY ((uint8_t)0x04)
 #define: RCC_IT_HSERDY ((uint8_t)0x08)
 #define: RCC_IT_PLLRDY ((uint8_t)0x10)
 #define: RCC_IT_CSS ((uint8_t)0x80)
RCC_LSE_configuration
 #define: RCC_LSE_OFF ((uint32_t)0x00000000)
 #define: RCC_LSE_ON RCC_BDCR_LSEON
 #define: RCC_LSE_Bypass ((uint32_t)(RCC_BDCR_LSEON |
RCC_BDCR_LSEBYP))
RCC_LSE_Drive_Configuration
 #define: RCC_LSEDrive_Low ((uint32_t)0x00000000)