ST STM32F31xx

UM1581
Reset and clock control (RCC)
DocID023800 Rev 1
347/584
 #define: RCC_LSEDrive_MediumLow RCC_BDCR_LSEDRV_0
 #define: RCC_LSEDrive_MediumHigh RCC_BDCR_LSEDRV_1
 #define: RCC_LSEDrive_High RCC_BDCR_LSEDRV
RCC_MCO_Clock_Source
 #define: RCC_MCOSource_NoClock ((uint8_t)0x00)
 #define: RCC_MCOSource_LSI ((uint8_t)0x02)
 #define: RCC_MCOSource_LSE ((uint8_t)0x03)
 #define: RCC_MCOSource_SYSCLK ((uint8_t)0x04)
 #define: RCC_MCOSource_HSI ((uint8_t)0x05)
 #define: RCC_MCOSource_HSE ((uint8_t)0x06)
 #define: RCC_MCOSource_PLLCLK_Div2 ((uint8_t)0x07)
RCC_PLL_Clock_Source
 #define: RCC_PLLSource_HSI_Div2 RCC_CFGR_PLLSRC_HSI_Div2
 #define: RCC_PLLSource_PREDIV1 RCC_CFGR_PLLSRC_PREDIV1