Reset and clock control (RCC)
ï‚· #define: RCC_ADC34PLLCLK_Div12 ((uint32_t)0x10002C00)
ï‚· #define: RCC_ADC34PLLCLK_Div16 ((uint32_t)0x10002E00)
ï‚· #define: RCC_ADC34PLLCLK_Div32 ((uint32_t)0x10003000)
ï‚· #define: RCC_ADC34PLLCLK_Div64 ((uint32_t)0x10003200)
ï‚· #define: RCC_ADC34PLLCLK_Div128 ((uint32_t)0x10003400)
ï‚· #define: RCC_ADC34PLLCLK_Div256 ((uint32_t)0x10003600)
RCC_AHB_Clock_Source
ï‚· #define: RCC_SYSCLK_Div1 RCC_CFGR_HPRE_DIV1
ï‚· #define: RCC_SYSCLK_Div2 RCC_CFGR_HPRE_DIV2
ï‚· #define: RCC_SYSCLK_Div4 RCC_CFGR_HPRE_DIV4
ï‚· #define: RCC_SYSCLK_Div8 RCC_CFGR_HPRE_DIV8
ï‚· #define: RCC_SYSCLK_Div16 RCC_CFGR_HPRE_DIV16
ï‚· #define: RCC_SYSCLK_Div64 RCC_CFGR_HPRE_DIV64