Reset and clock control (RCC)
ï‚· #define: RCC_SYSCLKSource_HSI RCC_CFGR_SW_HSI
ï‚· #define: RCC_SYSCLKSource_HSE RCC_CFGR_SW_HSE
ï‚· #define: RCC_SYSCLKSource_PLLCLK RCC_CFGR_SW_PLL
RCC_TIM_clock_source
ï‚· #define: RCC_TIM1CLK_HCLK ((uint32_t)0x00000000)
ï‚· #define: RCC_TIM1CLK_PLLCLK RCC_CFGR3_TIM1SW
ï‚· #define: RCC_TIM8CLK_HCLK ((uint32_t)0x10000000)
ï‚· #define: RCC_TIM8CLK_PLLCLK ((uint32_t)0x10000200)
RCC_USART_clock_source
ï‚· #define: RCC_USART1CLK_PCLK ((uint32_t)0x10000000)
ï‚· #define: RCC_USART1CLK_SYSCLK ((uint32_t)0x10000001)
ï‚· #define: RCC_USART1CLK_LSE ((uint32_t)0x10000002)
ï‚· #define: RCC_USART1CLK_HSI ((uint32_t)0x10000003)
ï‚· #define: RCC_USART2CLK_PCLK ((uint32_t)0x20000000)