USB on-the-go full-speed (OTG_FS) RM0090
1364/1731 DocID018909 Rev 11
B-device session request protocol
The application must set the SRP-capable bit in the Core USB configuration register. This
enables the OTG_FS controller to initiate SRP as a B-device. SRP is a means by which the
OTG_FS controller can request a new session from the host.
Figure 407. B-device SRP
1. VBUS_VALID = V
BUS
valid signal from PHY
B_VALID = B-peripheral valid session to PHY
DISCHRG_VBUS = discharge signal to PHY
SESS_END = session end signal to PHY
CHRG_VBUS = charge V
BUS
signal to PHY
DP = Data plus line
DM = Data minus line
1. To save power, the host suspends and turns off port power when the bus is idle.
The OTG_FS controller sets the early suspend bit in the Core interrupt register after 3
ms of bus idleness. Following this, the OTG_FS controller sets the USB suspend bit in
the Core interrupt register.
The OTG_FS controller informs the PHY to discharge V
BUS
.
2. The PHY indicates the session’s end to the device. This is the initial condition for SRP.
The OTG_FS controller requires 2 ms of SE0 before initiating SRP.
For a USB 1.1 full-speed serial transceiver, the application must wait until V
BUS
discharges to 0.2 V after BSVLD (in OTG_FS_GOTGCTL) is deasserted. This
discharge time can be obtained from the transceiver vendor and varies from one
transceiver to another.
3. The USB OTG core informs the PHY to speed up V
BUS
discharge.
4. The application initiates SRP by writing the session request bit in the OTG Control and
status register. The OTG_FS controller perform data-line pulsing followed by V
BUS
pulsing.
5. The host detects SRP from either the data-line or V
BUS
pulsing, and turns on V
BUS
.
The PHY indicates V
BUS
power-on to the device.
ai15682
VBUS_VALID
B_VALID
DISCHRG_VBUS
SESS_END
DP
DM
CHRG_VBUS
Suspend
Data line pulsing Connect
V
BUS
pulsing
1
6
2
3
4
5 8
7
Low
To Next Page
Loading...
Need help?
General
