DocID018909 Rev 11 273/1731
RM0090 General-purpose I/Os (GPIO)
290
• GPIO
Configure the desired I/O as output or input in the GPIOx_MODER register.
• Peripheral alternate function
For the ADC and DAC, configure the desired I/O as analog in the GPIOx_MODER
register.
For other peripherals:
– Configure the desired I/O as an alternate function in the GPIOx_MODER register
– Select the type, pull-up/pull-down and output speed via the GPIOx_OTYPER,
GPIOx_PUPDR and GPIOx_OSPEEDR registers, respectively
– Connect the I/O to the desired AFx in the GPIOx_AFRL or GPIOx_AFRH register
• EVENTOUT
Configure the I/O pin used to output the Cortex
®
-M4 with FPU EVENTOUT signal by
connecting it to AF15
Note: EVENTOUT is not mapped onto the following I/O pins: PC13, PC14, PC15, PH0, PH1 and
PI8.
Please refer to the “Alternate function mapping” table in the datasheets for the detailed
mapping of the system and peripherals’ alternate function I/O pins.
Table 36. Flexible SWJ-DP pin assignment
Available debug ports
SWJ I/O pin assigned
PA13 /
JTMS/
SWDIO
PA14 /
JTCK/
SWCLK
PA15 /
JTDI
PB3 /
JTDO
PB4/
NJTRST
Full SWJ (JTAG-DP + SW-DP) - Reset state X X X X X
Full SWJ (JTAG-DP + SW-DP) but without
NJTRST
XXXX
JTAG-DP Disabled and SW-DP Enabled X X
JTAG-DP Disabled and SW-DP Disabled Released
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