STMicroelectronics STM32F429 Reference Manual

DocID018909 Rev 11 193/1731
RM0090 Reset and clock control for STM32F42xxx and STM32F43xxx (RCC)
212
6.3.17 RCC AHB3 peripheral clock enable in low power mode register
(RCC_AHB3LPENR)
Address offset: 0x58
Reset value: 0x0000 0001
Access: no wait state, word, half-word and byte access.
6.3.18 RCC APB1 peripheral clock enable in low power mode register
(RCC_APB1LPENR)
Address offset: 0x60
Reset value: 0xF6FE C9FF
Access: no wait state, word, half-word and byte access.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Reserved
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Reserved
FMC
LPEN
rw
Bits 31:1Reserved, must be kept at reset value.
Bit 0
FMCLPEN: Flexible memory controller module clock enable during Sleep mode
This bit is set and cleared by software.
0: FMC module clock disabled during Sleep mode
1: FMC module clock enabled during Sleep mode
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
UART8
LPEN
UART7
LPEN
DAC
LPEN
PWR
LPEN
RESER
VED
CAN2
LPEN
CAN1
LPEN
Reser-
ved
I2C3
LPEN
I2C2
LPEN
I2C1
LPEN
UART5
LPEN
UART4
LPEN
USART
3
LPEN
USART
2
LPEN
Reser-
ved
rw rw rw rw rw rw rw rw rw rw rw rw rw
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
SPI3
LPEN
SPI2
LPEN
Reserved
WWDG
LPEN
Reserved
TIM14
LPEN
TIM13
LPEN
TIM12
LPEN
TIM7
LPEN
TIM6
LPEN
TIM5
LPEN
TIM4
LPEN
TIM3
LPEN
TIM2
LPEN
rw rw rw rw rw rw rw rw rw rw rw rw

STMicroelectronics STM32F429 Specifications

General

Brand	STMicroelectronics
Model	STM32F429
Category	Controller
Language	English