DocID018909 Rev 11 791/1731
RM0090 Real-time clock (RTC)
828
Figure 237. RTC block diagram
1. On STM32F4xx devices, the RTC_AF1 and RTC_AF2 alternate functions are connected to PC13 and PI8,
respectively.
26.3 RTC functional description
26.3.1 Clock and prescalers
The RTC clock source (RTCCLK) is selected through the clock controller among the LSE
clock, the LSI oscillator clock, and the HSE clock. For more information on the RTC clock
source configuration, refer to
Section 7: Reset and clock control for STM32F405xx/07xx
and STM32F415xx/17xx(RCC) and Section 6: Reset and clock control for STM32F42xxx
and STM32F43xxx (RCC).
A programmable prescaler stage generates a 1 Hz clock which is used to update the
calendar. To minimize power consumption, the prescaler is split into 2 programmable
prescalers (see
Figure 237: RTC block diagram):
• A 7-bit asynchronous prescaler configured through the PREDIV_A bits of the
RTC_PRER register.
• A 15-bit synchronous prescaler configured through the PREDIV_S bits of the
RTC_PRER register.
Note: When both prescalers are used, it is recommended to configure the asynchronous prescaler
to a high value to minimize consumption.
The asynchronous prescaler division factor is set to 128, and the synchronous division
factor to 256, to obtain an internal clock frequency of 1
Hz (ck_spre) with an LSE frequency
of 32.768
kHz.
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