General-purpose timers (TIM2 to TIM5) RM0090
640/1731 DocID018909 Rev 11
Refer to Section: Memory map for the register boundary addresses.
0x2C
TIMx_ARR
ARR[31:16]
(TIM2 and TIM5 only, reserved on the other timers)
ARR[15:0]
Reset value 000000000000000000 0 0 000000000000
0x30
Reserved
0x34
TIMx_CCR1
CCR1[31:16]
(TIM2 and TIM5 only, reserved on the other timers)
CCR1[15:0]
Reset value 000000000000000000 0 0 000000000000
0x38
TIMx_CCR2
CCR2[31:16]
(TIM2 and TIM5 only, reserved on the other timers)
CCR2[15:0]
Reset value 000000000000000000 0 0 000000000000
0x3C
TIMx_CCR3
CCR3[31:16]
(TIM2 and TIM5 only, reserved on the other timers)
CCR3[15:0]
Reset value 000000000000000000 0 0 000000000000
0x40
TIMx_CCR4
CCR4[31:16]
(TIM2 and TIM5 only, reserved on the other timers)
CCR4[15:0]
Reset value 000000000000000000 0 0 000000000000
0x44
Reserved
0x48
TIMx_DCR
Reserved
DBL[4:0]
Reserved
DBA[4:0]
Reset value 00000 00000
0x4C
TIMx_DMAR
Reserved
DMAB[15:0]
Reset value 0000000000000000
0x50
TIM2_OR
Reserved Reserved
ITR1_
RMP
Reserved
Reset value 00
0x50
TIM5_OR
Reserved Reserved
IT4_
RMP
Reserved
Reset value 00
Table 99. TIM2 to TIM5 register map and reset values (continued)
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0