Sun Microsystems SPARCstation 10SX User Manual

198 SPARCstation 20 Service Manual • July 1996
MBus Module
The MBus module provides a high-speed interface between the processor modules,
the physical memory, and the I/O devices. The MBus module operates at a clock
rate starting at 40 MHz. Interface features of the MBus module include:
■ Synchronous operation
■ Automatic switching
■ 64-bit multiplexed address and data
■ 64-Gbyte physical address space
■ Multiple master
■ Centralized arbitration, reset, interrupt, and clock distribution
■ Overlapped arbitration with parking
■ Shared memory multiprocessor signals and transactions
■ Write-invalidate cache coherency protocol
In the SPARCstation 20 system, the MBus module can automatically switch from a
40-MHz frequency to a 50-MHz frequency, depending on the type of MBus module
installed. Changing jumpers on the system board is not required.
MBus-to-SBus Interface
The MBus-to-SBus interface (MSBI) is located in the MSBI chip. The MSBI contains:
■ IOMMU
■ Base address register
■ IOMMU control register
■ Arbiter enable register
■ MBus-to-SBus asynchronous fault status and address registers
The IOMMU is used to perform address translations when SBus masters request the
SBus.
Memory
Various memory allocations are configured in up to eight SIMM slots. Allocations
include a combination of DSIMMs, VSIMMs, and NVSIMMs.
TABLE B-1 lists the
possible memory allocations using the three SIMM types.

Sun Microsystems SPARCstation 10SX Specifications

General

Brand	Sun Microsystems
Model	SPARCstation 10SX
Category	Desktop
Language	English