Circuit Descriptions
1502C MTDR Service Manual
5–21
to C8021 through R8025 to generate an exponentially rising pulse of about 4 VDC
peak during the pulse width.
Dual transistor Q8020 is a differential amplifier that is used as a voltage comparator
to detect when the pulse on C8021 has reached the DC voltage level set through
U4021B and R8023 by the zero-distance calibration circuit. This DC voltage level,
from zero to 4 VDC, allows setting the time when the voltage comparator switches
(a range of about 20 ns). Dual transistor Q9020 is connected as a current source,
providing a constant 2-mA bias to the emitters of Q8020. Between pulses, this
current flows through Q8020B. When the exponential pulse reaches the adjustable
voltage level, the current is rapidly transferred to Q8020A, causing a negative-going
pulse at R8020. This pulse is coupled to the output stage, Q9010, through C9020
and R9020. Transistor Q9010 is biased to 0.5 mA between pulses to obtain fast
turn-on, and provides a positive-going 5 VDC pulse to U8010B and U8010C.
Flip-flop U7010A is set or reset by the processor to steer the pulse either to the
option port or the driver. The negative-going pulse from gate U8010B or U8010C
is logically OR’d by U8010A, then applied to C9010 and R9010. This pulse is fed
back to the input of the gates U8010B and U8010C through CR9010 to obtain a
one-shot action, which stretches the driver strobe pulse width to 5
m
s. The driver
strobe is made available at TP9011.
The ramp trigger pulse from the digital timebase is AC-coupled by C3040 and
R3041 to Q4040. Diode CR3031 allows the negative-going pulse to pass directly,
while R3040 limits the input current sue to the re-charging of C3040 between
pulses. The output of Q4040 is held at ground by L5030 between pulses and rises
to 6 VDC during the pulse. Choke L5030 is center tapped to provide an equal
negative-going pulse at its undriven end. This pulse is fed through C5033 and
R4032 to the emitter of Q4031 to obtain positive feedback to Q4040. This forms a
one-shot circuit with the pulse width determined by C5033 and R4032. The 25 ns
ramp trigger pulse is thus stretched to about 80 ns at L5030.
Dual transistor Q5032 operates as a current source, providing a constant 5-mA
current, which is used to charge C5032 to create a linear voltage ramp. Between
ramp trigger pulses, this current is conducted through CR4032 and L5030 to ground,
creating a voltage of 0.5 VDC on C5032. The positive one-shot pulse from Q4040
turns off CR4032 and directs the charging current to C5032. The negative-going
pulse from L5030 is connected to C5032 through CR5030 to provide a cancelling
effect for the positive pulse being coupled through the capacitance of CR4032.
The linear rising voltage pulse from C5032 is buffered by source-follower Q5031
and emitter-follower Q5030 to provide a low output impedance and prevent loading
the ramp. Transistor Q7030 provides a constant 2-mA bias current to junction FET
Q5031.
The ramp voltage is AC-coupled to voltage comparator Q7021 by C7030 to remove
the DC offset voltage developed in the preceding circuits. A small negative DC
voltage of approximately –200 mV is added by voltage divider R7032 and R7025
to hold the voltage comparator off between pulses.
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