Operation
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Table 20-1. Slave Transmitter Mode (continued)
Status Application Software Response
Code
To I2CCFG
Status of the
(Value of Next Action Taken by I
2
C Hardware
I
2
C
To/From I2CDATA
I2CSTAT.
STA STO SI AA
STAC)
0xC8 Last data byte No action 0 0 0 0 Switched to not-addressed SLV mode; no
has been recognition of own SLA or general call address
transmitted;
or 0 0 0 1 Switched to not-addressed SLV mode; own SLA or
ACK has been
no action general call address is recognized.
received.
or 1 0 0 0 Switched to not-addressed SLV mode; no
no action recognition of own SLA or general call address;
START condition is transmitted when the bus
becomes free.
or 1 0 0 1 Switched to not-addressed SLV mode; own SLA or
no action general call address is recognized; START
condition is transmitted when the bus becomes
free.
20.1.4.1.2 I
2
C Slave Receiver Mode
Slave receiver mode is entered when the slave address transmitted by the master is identical to its own
address and a cleared R/W bit is received. In slave receiver mode, serial data bits received on SDA are
shifted in with the clock pulses that are generated by the master device. The slave device does not
generate the clock, but it can hold SCL low if intervention of the CPU is required after a byte has been
received.
If the slave interrupt is triggered from the master, the I
2
C module is automatically configured as a receiver
and I2CCFG.SI is set. After the first data byte is received, the interrupt flag I2CCFG.SI is set again. The
I
2
C module automatically acknowledges the received data.
While the I2CCFG.SI flag is set, the bus is stalled by holding SCL low.
When the master generates a STOP condition, the I2CCFG.STO flag is set.
If the master generates a repeated START condition, the I
2
C state machine returns to its address
reception state.
Table 20-2 provides more details regarding slave receiver operation.
Table 20-2. Slave Receiver Mode
Status Application Software Response
Code
To I2CCFG
Status of the
(Value of Next Action Taken by I
2
C Hardware
I
2
C
To/From I2CDATA
I2CSTAT.
STA STO SI AA
STAC)
0x60 Own SLA+W No action X 0 0 0 Data byte is received and not-ACK is returned
has been
or X 0 0 1 Data byte is received and ACK is returned.
received; ACK
no action
has been
returned.
0x68 Arbitration lost No action X 0 0 0 Data byte is received and not-ACK is returned.
in SLA+R/W as
or X 0 0 1 Data byte is received and ACK is returned.
master; own
no action
SLA+W has
been received,
ACK returned.
0x70 General-call No action X 0 0 0 Data byte is received and not-ACK is returned.
address (0x00)
or X 0 0 1 Data byte is received and ACK is returned.
has been
no action
received; ACK
has been
returned
182
SWRU191C–April 2009–Revised January 2012
I
2
C
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