Registers
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DACTEST0 (0x61BA) – DAC Override Value
Bit Name Reset R/W Description
No.
7 – 0 R0 Reserved. Read as 0
6:0
DAC_Q_O[6:0]
000 0000 R/W
Q-branch DAC override value when DAC_SRC = 001
If DAC_SRC is set to be ADC data, CORDIC magnitude, channel filtered data, then
DAC_Q_O controls the part of the word in question that actually is muxed to the
DAC as described in the following list.
00 0110 ≥ bits 6:0
00 0111 ≥ bits 7:1
00 1000 ≥ bits 8:2
and so on
If an invalid setting is chosen, then the DAC outputs only zeros (minimum value).
DACTEST1 (0x61BB) – DAC Override Value
Bit Name Reset R/W Description
No.
7 – 0 R0 Reserved. Read as 0
6:0
DAC_I_O[6:0]
000 0000 R/W
I-branch DAC override value when DAC_SRC = 001
If DAC_SRC is set to be ADC data, CORDIC magnitude, channel filtered data, then
DAC_I_O controls the part of the word in question that actually is muxed to the
DAC as described in the following list.
00 0110 ≥ bits 6:0
00 0111 ≥ bits 7:1
00 1000 ≥ bits 8:2
And so on
If an invalid setting is chosen, then the DAC outputs only zeros (minimum value),
DACTEST2 (0x61BC) – DAC Test Setting
Bit Name Reset R/W Description
No.
7:3 – 0010 1 R0 Reserved
2:0
DAC_SRC[2:0]
000 R/W
The TX DAC's data source is selected by DAC_SRC according to:
000: Normal operation (from modulator).
001: The DAC_I_O and DAC_Q_O override values
010: ADC data after decimation, magnitude-controlled by DAC_I_O and DAC_Q_O
011: I/Q after decimation, channel and dc filtering, magnitude-controlled by DAC_I_O and
DAC_Q_O
100: Cordic magnitude output and front-end gain is output, magnitude-controlled by
DAC_I_O and DAC_Q_O
101: RSSI I output on the I DAC
111: Reserved
ATEST (0x61BD) – Analog Test Control
Bit Name Reset R/W Description
No.
7:6 – 00 R0 Reserved. Read as 0
5:0
ATEST_CTRL[5:0]
00 0000 R/W Controls the analog test mode:
00 0000: Disabled
00 0001: Enables the temperature sensor (see also the TR0 register description in
Section 12.2.10).
Other values reserved.
282
CC253x Radio SWRU191C–April 2009–Revised January 2012
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