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TMS570LS0714
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SPNS226E –JUNE 2013–REVISED NOVEMBER 2016
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Terminal Configuration and FunctionsCopyright © 2013–2016, Texas Instruments Incorporated
4.2.1.13 System Module Interface
Table 4-13. PGE System Module Interface
TERMINAL
SIGNAL
TYPE
RESET
PULL
STATE
PULL TYPE DESCRIPTION
SIGNAL NAME
144
PGE
nPORRST 46 Input Pulldown 100 µA
Power-on reset, cold reset
External power supply monitor
circuitry must drive nPORRST
low when any of the supplies
to the microcontroller fall out
of the specified range. This
terminal has a glitch filter.
See Section 6.8.
nRST 116 I/O Pullup 100 µA
System reset, warm reset,
bidirectional.
The internal circuitry indicates
any reset condition by driving
nRST low.
The external circuitry can
assert a system reset by
driving nRST low. To ensure
that an external reset is not
arbitrarily generated, TI
recommends that an external
pullup resistor is connected to
this terminal.
This terminal has a glitch
filter. See Section 6.8.
nERROR 117 I/O Pulldown 20 µA
ESM Error Signal
Indicates error of high
severity. See Section 6.8.
4.2.1.14 Clock Inputs and Outputs
Table 4-14. PGE Clock Inputs and Outputs
Terminal Signal
Type
Reset Pull
State
Pull Type Description
Signal Name 144
PGE
OSCIN 18 Input – None From external
crystal/resonator, or
external clock input
KELVIN_GND 19 Input Kelvin ground for oscillator
OSCOUT 20 Output To external
crystal/resonator
ECLK 119 I/O Pulldown Programmable,
20 µA
External prescaled clock
output, or GIO.
GIOA[5]/EXTCLKIN1/EPWM1A /N2HET1_PIN_nDIS 14 Input Pulldown 20 µA External clock input #1
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