Manual 26166V1 MicroNet Simplex & MicroNet Plus
Woodward 17
After this diagnostics test is completed, the CPUs will determine if the GAP application on both CPUs is the
same.
If they have the EXACT same application CPU1 (located in slot A1) will be SYSCON and initialize the
I/O.
CPU2 will wait at a rendezvous point for the SYSCON CPU to be ready.
When the SYSCON CPU is ready it will turn out IO_LOCK (as indicated by the LED on the CPU) and
start running the GAP application.
After the SYSCON starts running the real-time code, the CPUs will start sharing data.
If the SYSCON CPU fails, the Backup CPU will take over running the GAP application and the I/O.
If the CPUs do not have the same application, CPU1 (located in slot A1) will become the SYSCON and
start up in the SIMPLEX mode (see section Only One CPU) with the Backup failed flag set to TRUE.
(see picture of CHAS_STAT block)
Single CPU operation (Simplex)
If only one CPU is started (or the second CPU is started 20 seconds after the first CPU) this CPU will
start up in the SIMPLEX mode.
When this occurs the CPU (in A1 or A14) will remove the WATCHDOG then wait 20 seconds for the
second CPU then continue with normal SYSCON start-up of initializing the I/O and running the real-
time application.
When the 2nd CPU is started, it will determine the other CPU is running and ask the SYSCON to allow
it to sync-in.
The SYSCON CPU will communicate with the BACKUP and if the BACKUP has the EXACT same
application and is functioning properly, the SYSCON will allow the BACKUP CPU to sync.
If the BACKUP syncs in correctly, the backup fault indication in the GAP will go FALSE (see Figure 2-
9).
2.3—MicroNet Plus Simplex
The MicroNet Controls family is developed around the VME chassis and a CPU module that goes into the
first active slot of the VME chassis. All I/O modules plug into the remaining slots of the VME chassis.
The MicroNet Plus chassis offers both simplex (single CPU) and redundant (dual CPU) operation with up to
14 VME slots per chassis. The system may be expanded to use multiple chassis to accommodate additional
system I/O requirements.
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