EasyManua.ls Logo

Woodward MicroNet Simplex - Figure 6-8. Powerpc CPU5200 Module (Motorola); Figure 6-9. CPU Module Block Diagram

Woodward MicroNet Simplex
130 pages
Print Icon
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
Manual 26166V1 MicroNet Simplex & MicroNet Plus
Woodward 64
CAN Port 1
CAN Status LED’s
CAN Port 2
Module Fault and
Status Indicators
VxWorks Debug
Service Port
Real Time Network
Ports 1 and 2
Ethernet Ports
1 and 2
RS-232 / 422 / 485
Serial Port
RESET Pushbutton
RUN / RESET LED
Figure 6-8. PowerPC CPU5200 Module (Motorola)
(2) CAN Channels
(5-pin, male, round)
MOTOROLA
MPC5200
MicroNet CPU, PowerPC
Front Panel
MicroNet VMEbus
P1
MicroNet VMEbus
P2
64MB FLASH
File System, On-Board
Reserved Boot Sectors
Bus Isolation
& XCVR Control
VME HotSwap
WGC
WGC
VMEBUS
CONTROLLER
(Master/Slave)
VMEbus
MASTER
VMEbus
SLAVE
DATA
BUFFERS
VME
ADDRESS
XCVR
VA(31:1)
CTRL
XCVR
VD(31:0)
VC(11:0)
VME
DATA
XCVR
VDB(31:0)
VCB(11:0)
CTRL
XCVR
WGC
MONITOR
FPGA
REDUNDANCY
CONTROLLER
HEALTH MONITOR
MFT, IOLOCK,
FAN MONITOR
Control & Status
ARBITER
BTO
SYSCON
1.2V 1.5V 1.8V 2.5V 3.3V
Isol 5V
coms, CAN
2.5V
2.5V
3.3V
3.3V
LOCAL PWR
MONITOR
5.0V_FAIL
3.3V_FAIL
2.5V_FAIL
1.8V_FAIL
1.5V_FAIL
1.2V_FAIL
RESET*
VME_24
(4) Isolated 5V
Power Supplies
(Serial and CAN)
1.8V
VME_5V
1.2V
LOCAL POWER
SUPPLY
1.5V
2.5v
3.3V
3.3V
HotSwap Ctrl
(+5V to 3.3V)
3.3V
2.5V
CDB(15:0)
RTC with
Battery
CAB(15:0)
ADDRESS
BUFFERS
V
A
B
(
3
1
:
1
)
CAN1
CAN2
MANUAL RESET
RUN / RESET LED
RUN / RESET
RESET SWITCH
RS-232 Port
RS-232 Debug
(MINI-DIN6F)
RD
GR
#2
CAN LED’s
#1
RD
GR
RD
GR
LED DRIVER
SYSCON + STANDBY
Low Voltage (LVCC)
IOLOCK Fault
Module Fault / Code
Watchdog / HealthFault
SYSCON STANDBY
LVCC IOLOCK
FAULT WDOG
GR
RD
RD
YL
RD
RD
(4) RJ45
10/100 ETHERNET
Channels
ETH1
ETH2
RTN1
RTN2
1.8V
RS-232 / 422 / 485
Configurable Port
RS-232/422/485
(DB9F)
DPRAM
5k x 32
64MByte
DDR SDRAM
(low)
64MByte
DDR SDRAM
(high)
DIP-SWITCH (S2)
1 2
3
4
LSB
ON
OFF
Figure 6-9. CPU Module Block Diagram
Released

Table of Contents

Related product manuals