Xilinx Spartan-6 FPGA Series

68 www.xilinx.com Spartan-6 FPGA PCB Design and Pin Planning
UG393 (v1.1) April 29, 2010
Chapter 6: I/O Pin and Clock Planning
of routing through the device (from inputs, to internal logic, to outputs). See WP311:
Improving Performance in Spartan-6 FPGA Designs for a discussion on this topic.
Density Migration
When migrating a design to a different density in the same package, it is important to
ensure that the pins selected during the pin-planning process are available across the
available devices. Chapter 7 of the Spartan-6 FPGA Packaging and Pinouts Specification
provides more details on density migration.