Zenith XBR413 - Page 57

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4. CPU & Control Register BLOCK DIAGRAM
IC1099
DMN8600
SDRAM_DQS[2:3]
SDRAM_DQM[2:3]
SDRAM_DQ[16:31]
SDRAM_A[0:13]
CLKE,RAS,CAS,WE]
SDRAM_DQ[0:15]
SDRAM_DQM[0:1]
SDRAM_DQS[0:1]
M2
IC1095
M4
IC1093
M3
IC1094
M1
IC1092
E5_DIR
/E5_OEL
E5_MA[1:5]
E5_MA[22:26]
BA[1:5]
BA[22:24]
HD[0:15]
E5_ALE
E5_ALE
IC2085
74LVT16373
IC2084
74LVT16245
IC2090
74LVC827
BA[6:21]
/FLASH_WE
/FCS0
/OE2
IC1057
FLASH ROM
HD[0:15]
BA[1:22]
IC2076
74LVT273
/REG1_WE
IC2078
74LVT273
BD[8:15]
/REG2_WE
BD[0:7]
IC2066
CPLD
EPM3032
BA1,BA[20:24]
/CS[0:3]
/CPLD_WE
/REG1_OE
/REG2_OC
/SMSC_CS
/REG1_WE
/REG2_WE
/E5_OEL
E5_DIR, /FCS0
A_SEL1
A_SEL2
PWDN_H
INT_PROG
SCL_88_SEL
D_CONT1
D_CONT2
D_CONT3
/RST_7114
/RST_7104
/RST_SMSC
/RST_ PHY
/RST_ADC
/RST_DAC