ABB RER670 - Page 16

Application............................................................................364
Setting guidelines................................................................. 364
Configurable logic blocks
................................................................365
Application................................................................................. 365
Setting guidelines...................................................................... 365
Configuration........................................................................ 365
Fixed signal function block FXDSIGN............................................ 367
Identification.............................................................................. 367
Application................................................................................. 367
Boolean 16 to Integer conversion B16I.......................................... 368
Identification.............................................................................. 368
Application................................................................................. 368
Boolean to integer conversion with logical node
representation, 16 bit BTIGAPC..................................................... 369
Identification.............................................................................. 369
Application................................................................................. 369
Integer to Boolean 16 conversion IB16.......................................... 370
Identification.............................................................................. 371
Application................................................................................. 371
Integer to Boolean 16 conversion with logic node
representation ITBGAPC................................................................372
Identification.............................................................................. 372
Application................................................................................. 372
Elapsed time integrator with limit transgression and overflow
supervision TEIGAPC.....................................................................373
Identification.............................................................................. 373
Application................................................................................. 373
Setting guidelines...................................................................... 374
Comparator for integer inputs - INTCOMP..................................... 374
Identification.............................................................................. 374
Application................................................................................. 374
Setting guidelines...................................................................... 375
Setting example.........................................................................375
Comparator for real inputs - REALCOMP...................................... 376
Identification.............................................................................. 376
Application................................................................................. 376
Setting guidelines...................................................................... 376
Setting example.........................................................................377
Section 15 Monitoring.....................................................................379
Measurement..................................................................................379
Identification.............................................................................. 379
Application................................................................................. 379
Zero clamping............................................................................381
Table of contents
10 Railway application RER670 2.2 IEC
Application manual