ABB RER670 - Page 99

Solution 2
V
U
S
I
V
I
U
I
U
I
V
I
S
HV-side
LV-side
16MVA
132/15kV
T1PPDIF
I2PW1
BLOCK
BLKRES
TRIP
I2PW2
BLKUNRES
BLKDRUNR
BLKDRSEN
TRRES
TRUNRES
TRDRUNR
TRDRSEN
START
IDALARM
ST2NDHRM
ST5THHRM
STWAVDET
IDL
IDLMAG
IBIAS
SMAI2
BLOCK
GRP2L1
GRP2L2
GRP2L1L2
GRP2N
G2AI2P
G2AI1
G2AI2
G2AI3
G2AI4
G2N
SMAI1
BLOCK
GRP1L1
GRP1L2
GRP1L1L2
GRP1N
G1AI2P
G1AI1
G1AI2
G1AI3
G1AI4
G1N
IED
1
2
2
3
3
4
4
5
CT 200/1
Star connected
CT 1600/1
I
S
1
=IEC16000065=1=en=Original.vsd
I
N
IEC16000065 V1 EN-US
Figure 38: CT wiring, pre-processing blocks and T1PPDIF connections for the
proposed Solution 2
This solution is similar to Solution 1. The only differences are the following:
1. In point 5 the settings in T1PPDIF are the following:
• PhSelW1 = (IL1-IL2)/2
• PhSelW2 = IL2
• InvW2Curr = Yes
2. The sequence of the HV currents is swapped by wiring towards the IED.
3. LV current is connected as phase L2 on the preprocessing function block.
1MRK 506 375-UEN A Section 6
Differential protection
Railway application RER670 2.2 IEC 93
Application manual