MC96F6432
22 June 22, 2018 Ver. 2.9
MC96F6332L
(32-LQFP)
1
2
9
10
8
3
4
5
6
7
11
12
13
14
15
16
24
23
17
22
21
20
19
18
32
31
30
29
28
27
26
25
P55/RESETB
P40/VLC3/RXD0/SCL0/MISO0
P41/VLC2/TXD0/SDA0/MOSI0
P52/EINT8/EC0/BLNK
P05/SEG24/AN3/EINT3/PWM4BB
P04/SEG25/AN2/EINT2/PWM4BA
P11/SEG15/AN12/EINT12/T2O/PWM2O
P12/SEG16/AN11/EINT11/T1O/PWM1O
P07/SEG22/AN5/EINT5/PWM4CB
P13/SEG17/AN10/EC1/BUZO
P06/SEG23/AN4/EINT4/PWM4CA
P22/SEG11/SS1
P21/SEG12/AN15/SCK1
P20/SEG13/AN14/TXD1/SDA1/MOSI1
P10/SEG14/AN13/RXD1/SCL1/MISO1
P27/SEG6
P26/SEG7
P31/COM6/SEG4
P30/COM7/SEG5
P51/XIN
P50/XOUT
P02/AN0/AVREF/EINT0/T4O/PWM4AA
P01/T3O/DSCL
P00/EC3/DSDA
VDD
VSS
P32/COM5/SEG3
P33/COM4/SEG2
P42/VLC1/SCK0
P53/SXIN/T0O/PWM0O
P54/SXOUT/EINT10
P03/SEG26/AN1/EINT1/PWM4AB
Figure 3.3 MC96F6332L 32LQFP Pin Assignment
NOTES) 1. On On-Chip Debugging, ISP uses P0[1:0] pin as DSDA, DSCL.
2. The P14-P17, P23-P25, P34-P37 and P43 pins should be selected as a push-pull output or an input
with pull-up resistor by software control when the 32-pin package is used.
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