Abov MC96F6432 Series - Page 32

MC96F6432
32 June 22, 2018 Ver. 2.9
Table 5-1 Normal Pin Description (Continued)
PIN
Name
I/O
Function
@RESET
Shared with
VLC0
I/O
LCD bias voltage pins
Input
P43/SS0
VLC1
P42/SCK0
VLC2
P41/TXD0/SDA0/MOSI0
VLC3
P40/RXD0/SCL0/MISO0
COM0–
COM1
I/O
LCD common signal outputs
Input
P37–P36
COM2–
COM3
P35–P34/SEG0–SEG1
COM4–
COM7
P33–P30/SEG2–SEG5
SEG0–
SEG1
I/O
LCD segment signal outputs
Input
P35–P34/COM2–COM3
SEG2–
SEG5
P33–P30/COM4–COM7
SEG6–
SEG10
P27–P23
SEG11
P22/SS1
SEG12
P21/SCK1/AN15
SEG13
P20/AN14/TXD1/SDA1/MOSI1
SEG14
P10/AN13/RXD1/SCL1/MISO1
SEG15
P11/AN12/EINT12/T2O/PWM2O
SEG16
P12/AN11/EINT11/T1O/PWM1O
SEG17
P13/AN10/EC1
SEG18
P14/AN9/MOSI2
SEG19
P15/AN8/MISO2
SEG20
P16/AN7/EINT7/SCK2
SEG21
P17/AN6/EINT6/SS2
SEG22
P07/AN5/EINT5/PWM4CB
SEG23
P06/AN4/EINT4/PWM4CA
SEG24
P05/AN3/EINT3/PWM4BB
SEG25
P04/AN2/EINT2/PWM4BA
SEG26
P03/AN1/EINT1/PWM4AB