ARM ARM7TDMI - Block, Core, and Functional Diagrams

Open Access
Circuit Descriptions
3-11
ARM Development Board (ARM7TDMI Version)
Hardware Reference Guide
ARM DUI 0017C
3.2.6 DRAM ASB Slave
This schematic is shown in A.8 DRAM ASB Slave on page A-9.
The DRAM subsystem comprises:
• an ASB slave controller (U14)
• two SIMM sockets (SK1 and SK2) which can be fitted with a variety of memory
modules
The DRAM controller supports one or two 72-pin SIMM slots and uses automatic SIMM
presence-detection for contiguous memory configuration. The DRAM controller provides:
• fast page-mode burst-mode sequential-access support
• byte, half-word and word transaction support
• 256-byte boundary page-mode cycle break-up
• DRAM refresh (using CAS-before-RAS Refresh mode)
• automatic module-size reconfiguration
• support for 4MB, 8MB and 16MB SIMM modules
Note
Although up to 64MB of DRAM can be fitted, the default memory map allows for 16MB. If you
require more DRAM, modify the system decoder to allow access to the range required.
The DRAM controller drives the address and control paths for the DRAM subsystem.
The datapath is shared with the SRAM subsystem.
DRAM SIMMs supported
The DRAM controller supports 72-pin modules built of 4Mb and 16Mb technology DRAM
devices, with a RAS Access Time specified at 70ns or faster.
Note
Where two SIMM modules are fitted, these must be of the same size and configuration.
Where only one SIMM is fitted then this should only be fitted to slot A.
The following size DRAM SIMM modules are supported:
These SIMMs are standard commodity parts for desktop computers and workstations, and
byte parity is not required or used. The basic memory size for all these modules is
determined by the two presence-detect bits (PD1, PD0) with the addition of two pull-up
resistors on the board. Only Slot A presence-detect is used.
4MB 32x1M 72-pin 70ns (single-sided module, 8 x 1Mx4)
4MB 36x1M 72-pin 70ns (single-sided module, 9 x 1Mx4)
8MB 32x2M 72-pin 70ns (double-sided module, 2 x 8 x 1Mx4)
8MB 36x2M 72-pin 70ns (double-sided module, 2 x 9 x 1Mx4)
16MB 32x4M 72-pin 70ns (single-sided module, 8 x 4Mx4)
16MB 36x4M 72-pin 70ns (single-sided module, 9 x 4Mx4)
32MB 32x8M 72-pin 70ns (double-sided module, 2 x 8 x 4Mx4)
32MB 36x8M 72-pin 70ns (double-sided module, 2 x 9x 4Mx4)
hrg.book Page 11 Wednesday, July 22, 1998 9:18 AM