Mentor ll User Guide 69
Issue Number: 12 www.controltechniques.com
Record of the trip before that which is saved in 10.27.
The four parameters 10.25 to 10.28 provide a permanent memory of the
last four trips. They are updated only by a new trip occurring.
0 = field loss trip enabled
Prevents the Drive from tripping when field loss is detected, for example,
in applications where the internal field supply is not used or is switched
off when the Drive is not running.
0 = feedback loss enabled
Prevents the Drive from tripping when speed feedback loss is detected,
for example in certain load-sharing applications and in applications
which do not involve motors, such as battery charging and other
electrolytic processes.
0 = supply/phase loss enabled
Prevents the Drive from tripping when supply or supply phase loss is
detected, allowing the Drive to ride through brief supply interruptions.
1 = motor overtemperature trip disabled
Prevents the Drive from tripping when motor temperature sensor input
changes to high resistance, for example when motor overtemperature
protection is used in the alarm mode, or to achieve a line normal stop.
0 = heatsink overtemperature trip enabled
Prevents the Drive from tripping when heatsink temperature sensor
detects a temperature greater than 100
o
C for example when the thyristor
(SCR) heatsink overtemperature protection is used in the alarm mode,
or to achieve a system normal stop.
This parameter defaulted to 1 on Drives with software before V5.
Factory set to 1 on Drives from M25-M105.
If 10.34 = 1, the Drive will trip. If an external trip is required, the user can
program any logic input to control this bit (refer to Menu 08). Alternatively
itcanbecontrolledbyapplicationsoftwareorthroughtheserial
interface.
If the Drive is healthy (normal), the data display for 10.35 is 0. The value
of 10.35 is continuously monitored by the processor. The Drive trips
immediately if a non-zero value (other than 255) appears via the serial
communications interface, or Processor 2 software.
If 10.35 = 255, this is the equivalent of a RESET.
When 10.36 = 1 the trip which normally would follow loss of the current
loop is disabled.
When set, the armature open circuit trip (AOP) is disabled.
10.28 The trip before 10.27
RO Uni
ô
0~255
ð
10.29 Disable field loss trip
RW Bit
ô
0or1
ð
0
10.30 Disable feedback loss trip
RW Bit
ô
0or1
ð
0
10.31 Disable supply or phase loss trip
RW Bit
ô
0or1
ð
0
10.32 Disable motor overtemperature trip
RW Bit
ô
0or1
ð
1
10.33 Disable heatsink overtemperature trip
RW Bit
ô
0or1
ð
0
10.34 External trip
RW Bit
ô
0or1
ð
0
10.35 Processor 2 trip
RW Uni
ô
0~255
ð
0
10.36 Disable current loop loss trip
RW Bit
ô
0or1
ð
0
10.37 Disable armature open circuit trip
RW Bit
ô
0or1
ð
0
NOTE
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