REV.-A
BUSY
ACKNLG
DATA
STROBE
Sequence
v
.-.
4
Figure 2-29. Data Transmission Timing
1. Data transmitted from the
host computer is latched into the gate array at the trailing edge of the
STROBE signal. The gate array
(IC7A)
then outputs the BUSY signal to the host computer.
2. The CPU reads the data latched in the gate array and clears the BUSY signal. However, the CPU also
outputs a
sbftware generated BUSY signal to the host computer via the gate array
(IC7A)
so that the
BUSY signal to the host computer remains HIGH.
3. The CPU stores the data from the gate array
(IC7A)
in the input buffer
(IC5A)
and informs the gate
array of completion of data processing through the data bus. The gate array outputs the ACK signal
to the host computer to indicate that 1 byte of data has been processed. The CPU then clears the
BUSY signal.
4. The printer is now ready to accept the next data byte.
2-35
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