THEORY
OF
OPERATION
biasing
components.
In the 245-MHz
to
1050-MHz position,
the signal passes through
diodes CR204 through CR209
to the output amplifier
Q2I5. This
low-distortion
output
amplifier has
6-dB
gain
and output capability
of 15 dBm.
For low-band operation
(0.01
MHz to 245
MHz),
the signal from the
power
splitter is
routed
through CR203 to an
adjustable attenuator, R224
through
R229, and then
to the
RF port of
U20
1
(a double-balanced mixer).
The signal frequency at the
mixer RF port
varies from 800. 1 MHz
to 1045
MHz. The
800-MHz
local oscillator
(LO)
signal
for the
mixer comes
from the Synthesizer
assembly through P
1 08
and
is amplified by
Q207.
'This
fixed-tuned
amplifier
has 13 dB of gain and
provides a 10-dBm signal at
the
mixer LO
port.
The mixer 0.01-M
Hz to 245-MHz output
signal is passed through a
diplexing
low-pass
filter (C219 through
C230, R230, R23I) that
suppresses unwanted mixer
spurious
products
while maintaining a
50-ohm load at the mixer
IF
port. The filtered IF signal
is
amplified
by a three-stage IF amplifier
Q202,
Q204j
Q206
and
associated
components.
The
IF
amplifier gain
increases
with
frequency and
is
nominally
35
dB at 0.01 MHz
and
37 dB
at 245
MHz.
This
gain
characteristic
compensates
for the increasing
loss with
frequency
of the mixer and the
diplexing
low-pass filter.
The
output of the IF amplifier
passes through a
245-MHz low-pass filter(C2I6,
C217, C218 and printed
inductors)
and
PIN
diode CR210 to the
output amplifier. The +15V
power supply for the
LO
and IF
amplifiers
is
switched off by Q30I
when the instrument
is operating
in the 245-MHz to
1050-MHz band
to
avoid introducing
spurious
products in the instrument
output.
3-53.
LEVELING
LOOP
The
leveling
loop accepts the
unleveled
245-MHz
to 1050-MHz
signal
from the
switchable low-pass filters
and generates
a
leveled
signal at the
power splitter output that
feeds the
HET
band switch. The
leveled
signal is
proportional
to the leveling loop
control
voltage that is generated
by the level-control
circuit.
The signal
amplitude
at the other
output of the power splitter
is detected by a
Schottky
detector diode,
CR202,
This diode generates
a temperature-dependent
dc voltage, which
is
a
non-linear
function
of the applied R F
voltage, so temperature
compensation
and linearization
are necessary.
The detector
diode signal is low-pa.ss
filtered
by L2I7 and
C253, and is offset
by
the
voltage across temperature-compensating
diode
CR126,
Q104,
Q105
and
associated
components form a
current
source circuit
that
provides bias current
for CR126 and
CR202.
The
offset detector diode voltage
at UIOIB pin
3
is
linearized by amplifier
U 101 B and its
associated feedback
components.
Potentiometer
RI44 provides
detector linearity
adjustment. Thus, the
voltage at UlOlB
pin
1 is proportional
to
the RF voltage at
detector
diode CR202.
This voltage
is
divided and applied to the
loop integrator
amplifier at U 101
A
pin 6. This
amplifier
drives the modulator through
emitter follower
Q103
and through the action
of
the
ALC loop, maintaining the
voltage
level at UlOl
A pin 6 equal to that on pin
5.
Pin
5
voltage is a function of the leveling
loop control
voltage
applied to R140.
R140, R141,
CR127, and CRI28 form
an
additional detector
linearizing
network
that
is active for low
RF levels.
Amplitude
modulation is achieved
by summing
an appropriately scaled
modulation signal with the dc leveling
loop control
voltage applied to R140,
The amplitude
modulator
consists of PIN
diodes
CR 1 1 7 through
CR
120,
resistors R 1
21
,
R122, and capacitors
Cl 37 and Cl 38.
Attenuation
through the
modulator
is a function of
bias current through the PIN
diodes.
This current is
provided
by the modulator linearizer
circuit (R123 through
RI29,
R148, R149,
CI39
through C143, and
CR121).
3-20
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