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Fluke 6060B - Data Communications; Display Filament Voltage; Bright Effect; Display Blanking

Fluke 6060B
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theory
of
operation
3-30. Display
PCA,
A1A1
.
The
Display
PCA AIM
provides a
readout of the
programmed
modulation,
trequency,
amplitude
parameters, and
status
information.
This
displayed
information and
the
bright
digit are
controlled by
the
Controller, A2A7,
under the
direction
of
the
instrument
software.
The
display is
comprised
of
two vacuum
fluorescent
displays
and
their
associated
control
circuitry. The
two
displays
are refreshed as
four
groups
of eight
display
fields
(usually
a digit)
each.
The
four
groups
share the
digit
(grid)
strobes but
have
individual
segment
(anode)
strobes.
3-31. DATA
COMMUNICATIONS
Display
data is
sent
through
a byte-wide
bidirectional
data bus
from
the
Controller A2A
/
and is
latched by
U1
through
U5 on
the
display
board.
Latch
select
signals
DIGL,
SEGIL
SEG2L,
SEG3L,
and
SEG9L
determine
which
latch
receives
the data.
Level
shifting
buffer
drivers U6
through UlO
interface the
TTL latches
directly
to
the
+37V
anodes of
the
vacuum
fluorescent
displays.
3-32. DISPLAY
FILAMENT
VOLTAGE
The
6.0V ac filament
voltage
for
the display
is
derived from
a
center-tapped
winding
on
the power
supply
transformer, Tl.
The ac
filament
voltage
is
biased
at
+6.2V
above
ground
by
circuitry
on the
power
supply
board A3A
1 ,
to provide a
cutoff
potential for
the
displays.
3-33.
BRlGHT-DlGIT
EFFECT
^
The
bright-digit
effect
is achieved by
providing
three extra
refresh
cycles
(strobes)
to the
specified
digit. Grid
current-limiting
resistor R3
provides
uniform
digit
brightness
by
controlling
electron
depletion
from
the display
cathode
filaments.
3-34.
SWITCHBOARD
INTERFACE
The digit
strobe data
latched by U1
is buffered by
open
collector
inverters
U13 and
u
15,
and strobes
the front
panel
switch
matrix.
The
switch
columns
are strobed in
unison
with
the
eight
display
fields. The
switch
matrix
status is read
by the
tri-state
buffer
U14.
3-35.
DISPLAY BLANKING
Monostable U
1 1 and
NOR
gate U 12
clear the
display
if new
field
or
segment
strobes
are
not
received.
This protects
the display if
the
microprocessor
stops
refreshing.
The
display
can be
blanked
manually
by
pressing
[SPCL]
[1][3]
which
sets the
signal
CLRL
and the
output of Ull
low, thus
clearing
latches
U2
through
U5. To
restore the
display,
press
[SPCL]
[1][2].
3-36.
MODULATION-LEVEL
INDICATOR
The
external
modulation-level
indicator
warns
the operator
when the
modulation
signal
is not set
to IV peak
2
%
typically).
The
external
modulation
signal is
compared
in the
dual-comparator,
U16,
with
internal
references
of
0.98 and
1.02V,
Two
status
bits,
MLEVLO
and
MLEVHl,
are at the
output of theO.5
second
dual
one-shot,
U17.
If
either
of these
reference
voltages
are
exceeded,
the two
status bits are
sensed by
the
Generator
Controller that
controls
the
‘EXT HP and
‘EXT LO’
indicators in
the
MODULATION
display
field.
3-37. Switch
PCB,
A1A2
.
. r
All the
front
panel
control keys,
except the
POWER ON/
OFF
switch,
consist
of an
Elastomer
membrane
sandwiched
between the
Switch
PCB A1A2
and the
front
panel
sheet
metal
housing.
The
Switch PCB
consists of a 6-by-S
matrix of
open
switch
contact
pads.
When a key
is
pressed, a
conductive pad
on the back
of
the
Elastomer
membrane
connects
a set of
contact
pads. The
Controller
software senses
what row
and
column
of
the matrix
are connected
when a key
is
pressed.
3-9

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