Honeywell SPZ-8000 - Page 155

I
I
RAM
RAM
16 BIT OATA
ADDRESS
BIDIRECTIONAL
POINTER
‘2k Xee11
I
P
<
BUFFER
60166 LOCAL
CPU
3UFFER
16 BIT BIDIRECTIONAL
BUFFER
DATA GLOBAL BUS
SERIAL
~
+
C~UNl
-lMTION
4
C~LER
ADDRESS
STATE
DECODER
MACHINE
6 BIT UNIDIREC
DATA GLOBA
RAM
PROM
16K X 16 BIT
32k
X 16 BIT
CPLI A1O
1-
1
BUFFER
60166
LOCAL
CPU
BUFFER
16 BIT DATA
BIDIRECTIONAL
WX IN -
v
LOCAL BUS 2
RAM PROM
16kx 16 BIT
32kx 16 BIT
I
!
CPU A12
I
l—
-1
MANCHESTER
ENCODER
I
-~~
CHANNEL 1
--— -—.. — .—-— -—-— -—-— ——.
SAME AS CHANNEL 1
L
DISPLAY UNIT
DISPLAY UNIT INTERFACE Al 1
CHANNEL 2
CHANNEL 2
+ ADDREss I
DISPLAY UNIT
CHANNEL 1
v
DATA
+
STATE
ADDRESS
GENERATOFiI
RAM
LATCH
MACHINE
7
BUFFER
16kx4BlT
,
t
,~1
I
I
I
I
1
I
WX INTERFACE A13
I
BUS [
‘26’”-
Blls A
BIJS B
4
DIFFERENTIAL
MONITOR
LINE
+
MICRO
4
~
DRtVER
I
m
CODE
+
+
MoNtToR
MONITOR
DRIVER VLsl
DATA BASE
+<
+
PROM
+
,
I
#
?
+ & —
—
TRANBMllTER +
TRANSMITTER
4
DRIVER
VLsl
DATA BASE
+
PROM
STANDARD BUS CONTROLLER M
I
1
I
POWER SUPPLY
r-
CLEAR
CONTROL CIRCUITS
I
A6
00K AHEAD
+
+
+
WX OUT
+
POWER SUPPLY
++5 VDC
+26 VDC~
TRANSFORMER CIRCUITS
++15VDC
A7
+-15 VDC
SG-884 Symbol Generator
Block Diagram
Figure 6-7 (Sheet 2)
22-14-00
Page 169/170
Aug 15/91
Use or disclosure of mformallon on Ihm page is subject 10 Ihe restrtctlons on the title page of this document.