Honeywell SPZ-8000 - Page 315

FLT TEST
ONLY
CDU
INTERFACE
CHASSIS QN[
CHASSIS GND
SIGNAL GND
SIGNALGND
SERVO POWER (H)
sERvo POWER (H)
CLUTCH POWER (H)
CLUTCH PowER (H)
COMPUTER POWER (H)
COMPUTER POWER (H)
SERVO POWER (L)
SERVO POWER (L)
CLUTCH POWER (L)
CLUTCH POWER (L)
COMPUTER POWER (L)
COMPUTER POWER (L)
ASCB PRIMARY PORT
{
(H)
(L)
ASCB SECONDARYPORT
{
(H)
(L)
RS232 RCVR
RS232 RTN
RS232 XMTR
RS232 RCVR
RS232 RTN
RS232 XMTR
{
RS422 XMTR (F71 GLK) U
RS422 xMTR (ml CNTL)
{
(H)
(L)
RS422 XMTR (F71 DATA)
{
(H)
(L)
RS422 RCVR (Ffl DATA)
{
(H)
(L)
{
(H)
‘W22 ‘CVR ‘H’ CNTL) (L)
RS422 XMTR (CDU
CLK)
{
(H)
(L)
{
(H)
‘s422 ‘MTR ‘CDU CNTL) (L)
1S422 XMTR (CDU DATA)
{
(H)
(L)
RS422 RCVR (CDU OATA)
{
(H)
(L)
1
RS422 RCVR (COU CNTL)
{
(H)
(L)
RS232 RCVR
RS232 RTN
RS232 XMTF!
1A
1
2
3
4
5
6
7
8
9
10
11
12
13
14
33
M
39
!0
41
45
46
47
B4
05
e6
B7
3s
09
90
91
92
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17
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Ml
01
02
03
M
05
M
12
43
b4
1=
1
2
E
POWER
SUPPLY
~
4
5
d
ASCB
CPU
lB~— ——— — ‘————— ‘————— ‘————— 1
JIA JIE
23
24
48
49
50
54
59
~
60
~
62
~
63
~
6s
MONITORS 72
73
74
75
m
67
M
69
ao
91
92
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xx
Ell R:
“’’”(
‘N”m
I
‘L--J’JJ
\
PERFORMANCE
\
CPU
I
I
~
I
AUTOTHROITLE
CPU
-L—————— ——————— —
Performance Computer
Block Diagram
Figure 9-9
22-14-00
17
18
I
I
I
I
I
I
I
—
———— ————
J
SERVO CLUTCH ORIVE NO. 1
SERVO CLUTCH ORIVE NO. 2
CROSS SIOE NT ENGAGE
AA ENGAGE
MAINT TEST ENABLE
GEAR DOWN
LEFf/RIGHT SELECT
ASCS VEFl NB
LEFf BLEEO SRC ON
RIGHT BLEED SRC ON
ASCB SINGLE/OUAL
FLAPS IN MOTION
LE17 AC PACK ON/OFF
RIGHT AC PACK ON/OFF
wow
NT ENGAGEIOISENGAGE
INTERLOCK NO. 1
INTERLOCK NO, 2
INTERLOCK NO. 3
INTERLOCK NO. 4
MT DISCONNECT
AIT ENGAGE GNO
PERF COMP INSTALLEO
(c)
PLA 1 Pos
(c)
PLA 2 Pos
(L)
}
SERVO NO. 1 TACH
(H)
(L)
(H)
}
SERVO NO. 2 TACH
(L)
}
PLA 1 Pos
(H)
(L)
}
PLA 2 Pos
(H)
(L)
}
PLA REF
(H)
(H)
)
SERVO NO. 1 ORIVE
(L)
(H)
(L)
}
SERVO NO. 2 DRIVE
AO-30256#
Page 198.149/198.150
Aug 15/91
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