9: S
HIFT
/ R
OTATE
I
NSTRUCTIONS
9-2 FC6A S
ERIES
MICROS
MART
L
ADDER
P
ROGRAMMING
M
ANUAL
FC9Y-B1726
Examples: SFTL
• N_B = 16 bits
• N_B = 32 bits
M8120 is the initialize pulse special internal relay.
When the CPU starts operation, the MOV (move) instruction sets
43,690 to data register D10.
Each time input I0 is turned on, 16-bit data of data register D10 is
shifted to the left by 1 bit as assigned by device Bits. The last bit
status shifted out is set to special internal relay M8003 (carry or
borrow). Zeros are set to the LSB.
M8120
REP
SOTU
I0
S1 –
43690
D1 –
D10
S1
D10
Bits
1
SFTL
MOV(W)
S2
0
N_B
16
0Before shift: D10 = 43690 1 1 1000 1 0 1 1 1000 1 0
CY
M8003
MSB LSB
D10
1After first shift: D10 = 21844 01 1000 1 0 1 1 1000 1 0
CY
M8003
MSB LSB
D10
Bits to shift = 1
0
00 0111 0 1 0 0 0111 0 00After second shift: D10 = 43688
CY
M8003
MSB LSB
D10
Shift to the left
S2
M8120 is the initialize pulse special internal relay.
When the CPU starts operation, the MOV (move) instructions set
0 and 65,535 to data registers D10 and D11, respectively.
Each time input I0 is turned on, 32-bit data of data registers D10
and D11 is shifted to the left by 2 bits as assigned by device Bits.
D10 is the low word, and D11 is the high word.
The last bit status shifted out is set to a carry (special internal
relay M8003). Ones are set to the LSBs.
M8120
REP
SOTU
I0
S1 –
0
D1 –
D10
S1
D10
Bits
2
SFTL
MOV(W)
S2
1
N_B
32
REPS1 –
65535
D1 –
D11
MOV(W)
Bits to shift = 2
1
Before shift:
0 0 0000 0 0 0 0 0000 0 0
CY
M8003
MSB LSB
D11
1
After shift:
10 0000 0 0 0 0 0000 0 1
CY
M8003
MSB LSB
D10
Shift to the left
01 1111 1 1 1 1 1111 1 0
1 1 1111 1 1 1 1 1111 1 1
D10 S2
D11