Intel 5000 Series - Page 5

Intel® 5000 Series Chipsets Server Board Family Datasheet Table of Contents
Revision 1.1
Intel order number D38960-004
v
2.4.16 Native USB Support...............................................................................................21
2.4.17 Legacy USB Support..............................................................................................21
2.4.18 Super I/O................................................................................................................21
2.4.19 BIOS Flash.............................................................................................................22
2.5 Clock Generation and Distribution .........................................................................23
3. System BIOS .......................................................................................................................24
3.1 BIOS Identification String.......................................................................................24
3.2 Processors .............................................................................................................25
3.2.1 CPUID....................................................................................................................25
3.2.2 Multiple Processor Initialization..............................................................................25
3.2.3 Mixed Processor Steppings ...................................................................................26
3.2.4 Mixed Processor Families......................................................................................26
3.2.5 Mixed Processor System Bus Speeds...................................................................26
3.2.6 Mixed Processor Cache Sizes ...............................................................................26
3.2.7 Microcode Update..................................................................................................26
3.2.8 Processor Cache....................................................................................................26
3.2.9 Mixed Processor Configuration..............................................................................26
3.2.10 Hyper-Threading Technology.................................................................................28
3.2.11 Intel SpeedStep
®
Technology ................................................................................28
3.2.12 Intel
®
Extended Memory 64 Technology (Intel
®
EM64T)........................................28
3.2.13 Execute Disable Bit Feature...................................................................................29
3.2.14 Enhanced Halt State (C1E)....................................................................................29
3.2.15 Multi-Core Processor Support................................................................................29
3.2.16 Intel
®
Virtualization Technology..............................................................................30
3.2.17 Acoustical Fan Speed Control................................................................................30
3.3 Memory ..................................................................................................................30
3.3.1 Memory Sizing and Configuration..........................................................................30
3.3.2 POST Error Codes.................................................................................................31
3.3.3 Publishing System Memory....................................................................................31
3.3.4 Mixed Speed Memory Modules..............................................................................32
3.3.5 Memory Test ..........................................................................................................33
3.3.6 Memory Scrub Engine............................................................................................33
3.3.7 Memory Map and Population Rules.......................................................................34
3.3.8 Memory Modes of Operation..................................................................................36
3.3.9 Memory RAS..........................................................................................................36