Intel Agilex Series

Note:
Device configuration may fail under the following conditions when you select the OSC_CLK_1 as the clock source for
configuration:
•
You fail to drive the OSC_CLK_1 pin or the OSC_CLK_1 is not stable and free running due to an interruption or a
frequency change.
•
You drive the OSC_CLK_1 pin at an incorrect frequency. Select one of the following input reference clock frequencies to
drive the OSC_CLK_1 pin:
— 25 MHz
— 100 MHz
— 125 MHz
The Intel Agilex device multiplies the OSC_CLK_1 source clock frequency to generate a 250 MHz clock for configuration. Using
an OSC_CLK_1 source enables the fastest possible configuration. Refer to Setting Configuration Clock Source for instructions
setting this frequency using the Intel Quartus Prime Software.
Configuration Clock Requirements for Reconfiguration Without Power Cycling the Device
When you specify OSC_CLK_1 for configuration and reconfigure without powering down the Intel Agilex device, the device can
only reconfigure with OSC_CLK_1. In this scenario, OSC_CLK_1 must be a free-running clock.
Configuration Clock Requirements for Configuration After Powering Cycling the Device
After a power-down, when you specify OSC_CLK_1 for configuration, the Intel Agilex device uses the internal oscillator to load
the first section of the bitstream and OSC_CLK_1 for the remainder.
2.7. Intel Agilex Configuration Time Estimation
This section describes configuration time for various configuration modes for different bitstream sizes. For example, in PCIe
designs, your system software may require the Intel Agilex device to enter user mode in less than 1 second to return a
successful completion status for a valid configuration request. Use the values referenced below to determine the configuration
mode that best suits your design requirements.
The table provides time estimates for the full FPGA configuration only. In HPS enabled designs, the table also considers the
FPGA configuration first mode. Note that the HPS boot first mode in HPS enabled designs is not considered. Also, the CvP
periphery image configuration is not considered. In general, if you use the Micron flash device for AS x4 configuration, the
CvP periphery image configuration time is expected to be less than 100 ms.
2. Intel Agilex Configuration Details
683673 | 2021.10.29
Intel
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Agilex
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Configuration User Guide
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