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Intel Agilex Series User Manual

Intel Agilex Series
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6. Intel Agilex Configuration Features
6.1. Device Security
Note: Contact your Intel sales representative for more information about the device security support in Intel Agilex production
devices.
The Intel Agilex device provides the following flexible and robust security features to protect sensitive data and intellectual
property:
User image authentication and encryption
Public-Key based authentication
Advanced Encryption Standard (AES)-256 Encryption
JTAG Disable
JTAG Debug Disable/Enable
Side channel protection
6.2. Configuration via Protocol
The CvP configuration scheme creates separate images for the periphery and core logic. You can store the periphery image in
a local configuration device and the core image in host memory, reducing system costs and increasing the security for the
proprietary core image. CvP configures the FPGA fabric through the PCI Express (PCIe) link and is available for Endpoint
variants only.
683673 | 2021.10.29
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of its FPGA and semiconductor products to current specifications in accordance with Intel's standard warranty, but reserves the right to make changes to any
products and services at any time without notice. Intel assumes no responsibility or liability arising out of the application or use of any information, product, or
service described herein except as expressly agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before
relying on any published information and before placing orders for products or services.
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Intel Agilex Series Specifications

General IconGeneral
ArchitectureFPGA
AI Tensor BlocksYes
CategoryFPGA
FamilyAgilex
Transceiver SpeedUp to 112 Gbps
ManufacturerIntel
SeriesAgilex
Transceiver Data RateUp to 112 Gbps
Memory SupportHBM2E
PCIe SupportPCIe 5.0
MemoryHBM2e
Power EfficiencyImproved over previous generations
Operating TemperatureCommercial, Industrial
Process Technology10nm

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