Intel Agilex Series User Manual

AS Fast Mode
The only difference between AS normal mode and fast mode is that this mode does not delay for 10 ms before beginning
configuration. Use this mode to meet the 100 ms of link up requirement for PCIe or for other systems with strict timing
requirements.
In AS fast mode, the power-on sequence must ensure that the quad SPI flash memory is out of reset before the SDM because
the Intel Agilex device accesses flash memory immediately after exiting reset. The power supply must be able to provide an
equally fast ramp up for the Intel Agilex device and the external AS x4 flash devices. Failing to meet this requirement causes
the SDM to report that the memory is missing. Consequently, configuration fails.
Related Information
• Avalon Interface Specifications
• Intel Agilex Configuration via Protocol (CvP) Implementation User Guide
• Intel Agilex Device Data Sheet
• Intel FPGA P-Tile Avalon Streaming (Avalon ST ) IP for User Guide
1.1.1. Configuration and Related Signals
The following figure shows the configuration interfaces and configuration-related device functions. Pins shown in dark blue use
dedicated SDM I/Os. Pins shown in black use general purpose I/Os (GPIOs). Pins shown in red are dedicated JTAG I/Os.
You specify SDM I/O pin functions using the Device ➤ Configuration ➤ Device and Pin Options dialog box in the Intel
Quartus Prime software.
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Configuration User Guide
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Configuration User Guide
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Intel Agilex Series Specifications

General

Architecture	FPGA
AI Tensor Blocks	Yes
Category	FPGA
Family	Agilex
Transceiver Speed	Up to 112 Gbps
Manufacturer	Intel
Series	Agilex
Transceiver Data Rate	Up to 112 Gbps
Memory Support	HBM2E
PCIe Support	PCIe 5.0
Memory	HBM2e
Power Efficiency	Improved over previous generations
Operating Temperature	Commercial, Industrial
Process Technology	10nm