Figure 23. FPGA Configuration Tab of the PFL II IP
Option bits
FPGA Configuration
You use the Programming File Generator dialog box to specify the Start address of the option bits. Specify your flash
device using Add Device on the Configuration Tab of the Programming File Generator dialog box. Then click OPTIONS
and EDIT to specify the Start address for the option bits. This Start address must match the address you specify for What
is the byte address of the option bits, in hex? when specifying the PFL II IP parameters.
The Intel Quartus Prime Programming File Generator generates the information for the .pof version when you convert
the .sofs to .pofs. The value for the .pof version for Intel Agilex is 0x05. The following table shows an example of page
layout for a .pof using all eight pages. This example stores the .pof version at 0x80.
3. Intel Agilex Configuration Schemes
683673 | 2021.10.29
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