Intel Agilex Series

Figure 24. Implementing Page Mode and Option Bits in the CFI Flash Memory Device
Option Bits
Configuration Data (Page 2)
Configuration Data (Page 1)
Configuration Data (Page 0)
Page 2 Address + Page-Valid
Page 1 Address + Page-Valid
Page 0 Address + Page-Valid
End Address
0x000000
8 Bits
32 Bits
The following figure shows the layout of the option bits for a single page. Because the start address must be on an 8 KB
boundary, bits 0-12 of the page start address are set to zero and are not stored in the option bits.
3. Intel Agilex Configuration Schemes
683673 | 2021.10.29
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