Product Description
31
1.8.2 Intel
®
815EP Chipset
The Intel 815EP chipset consists of the following devices:
• 82815EP Memory Controller Hub (MCH) with Accelerated Hub Architecture (AHA) bus
• 82801BA I/O Controller Hub (ICH2) with AHA bus
• SST 49LF004A Firmware Hub (FWH)
The MCH is a centralized controller for the system bus, the memory bus, the AGP bus, and the
AHA bus. The ICH2 is a centralized controller for the board’s I/O paths. The FWH provides the
nonvolatile storage of the BIOS.
The Intel 815EP chipset provides the interfaces shown in Figure 7.
815EP Chipset
82801BA
I/O Controller Hub
(ICH2)
82815EP
Memory Controller
Hub (MCH)
SST 49LF004A
Firmware Hub
(FWH)
AHA
Bus
System Bus
ATA-66/100
USB
AGP Bus
OM11318
Network
AC LinkPCI BusSMBus
SDRAM Bus
LPC Bus
Figure 7. Intel 815EP Chipset Block Diagram
For information about Refer to
The Intel 815EP chipset http://developer.intel.com/design/chipsets/815ep
The resources used by the chipset Chapter 2
The chipset’s compliance with ACPI, APM, and AC ’97 Table 4, page 20